Starting point for the RX RDK version of the demo app.

pull/4/head
Richard Barry 15 years ago
parent 07006b001e
commit 17add98d2f

@ -0,0 +1,965 @@
[HIMDBVersion]
2.0
[DATABASE_VERSION]
"2.3"
[SESSION_DETAILS]
""
[INFORMATION]
""
[GENERAL_DATA]
"FIRST_CONNECTION_TAG" "NO"
"MRULABELS_DATAMANAGER_KEY" "FFFFFFFF|00000000|fff83a05|103c|1710|14cc"
"RESET_CPU_AFTER_DOWNLOAD_TAG" "VARIANT_TRUE_STORE_TAG"
"{0AF60212-1285-4767-AB8A-73DB62CC8DBD}R_ECXOS_0ECXOS_OBJECT01" " "
"{0AF60212-1285-4767-AB8A-73DB62CC8DBD}R_ECXOS_0ECXOS_OBJECT02" " "
"{0AF60212-1285-4767-AB8A-73DB62CC8DBD}R_ECXOS_0ECXOS_OBJECT03" " "
"{0AF60212-1285-4767-AB8A-73DB62CC8DBD}R_ECXOS_0ECXOS_OBJECT04" " "
"{0AF60212-1285-4767-AB8A-73DB62CC8DBD}R_ECXOS_0ECXOS_OBJECT05" " "
"{0AF60212-1285-4767-AB8A-73DB62CC8DBD}R_ECXOS_0ECXOS_OBJECT06" " "
"{0AF60212-1285-4767-AB8A-73DB62CC8DBD}R_ECXOS_0ECXOS_OBJECT07" " "
"{0AF60212-1285-4767-AB8A-73DB62CC8DBD}R_ECXOS_0ECXOS_OBJECT08" " "
"{0AF60212-1285-4767-AB8A-73DB62CC8DBD}R_ECXOS_0ECXOS_OBJECT09" " "
"{0AF60212-1285-4767-AB8A-73DB62CC8DBD}R_ECXOS_0ECXOS_OBJECT10" " "
"{0AF60212-1285-4767-AB8A-73DB62CC8DBD}R_ECXOS_0ECXOS_OBJECT_DEFINE_FILE" ""
"{0AF60212-1285-4767-AB8A-73DB62CC8DBD}R_ECXOS_0ECXOS_OBJECT_DEFINE_SELETCT" "1"
"{0AF60212-1285-4767-AB8A-73DB62CC8DBD}R_ECXOS_0ECXOS_OBJECT_MODIFIED" "1"
"{0AF60212-1285-4767-AB8A-73DB62CC8DBD}R_ECXOS_0ECXOS_OBJECT_NOREAD_OSOBJECT" "0"
"{0AF60212-1285-4767-AB8A-73DB62CC8DBD}R_ECXOS_0ECXOS_OBJECT_SAMPLING_PERIOD" "100"
"{228DB593-0AB2-4EBE-A098-A2CABF094E46}RamMonitorCtrlViews" "0"
"{287A8023-99B5-49E1-A54E-4DDCA43D7959}MapCtrlECX_MAP_FIND_SYMBOL_LIST" ""
"{287A8023-99B5-49E1-A54E-4DDCA43D7959}MapCtrlViews" "0"
"{2BA6A3EE-6488-11D5-80D4-00C04F68EAD7}ECXLABEL_ADDDLG_ADDR" ""
"{2BA6A3EE-6488-11D5-80D4-00C04F68EAD7}LabelCtrlSymbolFileDir" ""
"{2BA6A3EE-6488-11D5-80D4-00C04F68EAD7}LabelCtrlSymbolFileName" ""
"{2BA6A3EE-6488-11D5-80D4-00C04F68EAD7}LabelCtrlViews" "0"
"{2BA6A3EF-6488-11D5-80D4-00C04F68EAD7}StatusCtrlViews" "0"
"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlBatchFileName" ""
"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlBreakpointFlag" "-1 "
"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlBreakpointStatus" "-1 "
"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlBrowseDirectory" ""
"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlLogFileName" ""
"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlSplitterPosition" "242"
"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlViews" "1"
"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlWindowProperties" "17"
"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineWndInstanceKey0" "{WK_00000001_CmdLine}"
"{313F4FC1-6566-11D5-8BBE-0004E2013C71}TclTkCtrlLogFileName" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_COMPARE_END_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_COMPARE_START_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_DISPLAY_DEST_ADDRESS" "103c"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_DISPLAY_END_ADDRESS" "FFFFFFFF"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_DISPLAY_START_ADDRESS" "00000000"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_FILL_END_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_FILL_START_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_MOVE_END_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_MOVE_START_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_SEARCH_END_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_SEARCH_START_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_SET_DEST_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_TEST_END_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_TEST_START_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryCtrlViews" "0"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewA0AutoRefreshEnableTopPane" "0"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewA0AutoRefreshIntervalTopPane" "100"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewA0DataLength" "4"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewA0DispAddressTopPane" "5904"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewA0DispCode" "42208"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewA0DispColumnCount" "4"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewA0IsDispCode" "1"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewA0IsDispFloat" "0"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewA0IsDispLabel" "0"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewA0IsDispRegister" "0"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewA0IsRegFollowEnableTopPane" "0"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewA0LabelWidth" "96"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewA0Radix" "16"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewA0RegFollowRegTblIDTopPane" "0"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewA0RegisterWidth" "96"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewA0ScrollEndAddress" "-1"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewA0ScrollStartAddress" "0"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewA0StartUpSymbolTopPane" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewAInstanceKey0" "{WK_00000001_MEMORY}RTOSDemoDefaultSession"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewB0AutoRefreshEnableTopPane" "0"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewB0AutoRefreshIntervalTopPane" "100"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewB0DataLength" "4"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewB0DispAddressTopPane" "5324"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewB0DispCode" "42208"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewB0DispColumnCount" "4"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewB0IsDispCode" "1"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewB0IsDispFloat" "0"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewB0IsDispLabel" "0"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewB0IsDispRegister" "0"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewB0IsRegFollowEnableTopPane" "0"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewB0LabelWidth" "96"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewB0Radix" "16"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewB0RegFollowRegTblIDTopPane" "0"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewB0RegisterWidth" "96"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewB0ScrollEndAddress" "-1"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewB0ScrollStartAddress" "0"
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewB0StartUpSymbolTopPane" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryWndViewBInstanceKey0" "{WK_00000001_MEMORY}RTOSDemoDefaultSessionViewB"
"{4F025ABC-BE66-4CB6-9CEE-06C61418278E}Trace2CtrlSaveFileDir" ""
"{4F025ABC-BE66-4CB6-9CEE-06C61418278E}Trace2CtrlSaveFileName" ""
"{4F025ABC-BE66-4CB6-9CEE-06C61418278E}Trace2CtrlViews" "0"
"{5F75FDA0-6FF0-11D5-B7CE-00E029352378}PACtrlSaveFileDir" ""
"{5F75FDA0-6FF0-11D5-B7CE-00E029352378}PACtrlSaveFileName" ""
"{5F75FDA0-6FF0-11D5-B7CE-00E029352378}PACtrlViews" "0"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_EVAL_DENORMAL_MODE" "16777216"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_EVAL_ROUND_MODE" "768"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_0" "0000000000001AC8"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_1" "000000000000106C"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_10" "0000000000001AE0"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_11" "0000000063656843"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_12" "000000000000006B"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_13" "0000000000000000"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_14" "0000000000000000"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_15" "0000000000000002"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_16" "0000000000001AC8"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_17" "000000000000FF9C"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_18" "0000000004020001"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_19" "00000000FFF80178"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_2" "0000000000001A80"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_20" "00000000FFF868F0"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_21" "0000000000000000"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_22" "0000000000000000"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_23" "0000000000000000"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_24" "0000000000001000"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_25" "0000000000000000"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_3" "0000000000001064"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_4" "0000000000000001"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_5" "0000000000000000"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_6" "0000000000000000"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_7" "0000000000001A80"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_8" "0000000000000000"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_9" "0000000000000004"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_COUNT" "26"
"{6C4D5B81-FD67-46A9-A089-EA44DCDE47FD}RAMMonitorManagerCtrlBlockInfoFileDir" ""
"{6C4D5B81-FD67-46A9-A089-EA44DCDE47FD}RAMMonitorManagerCtrlBlockInfoFileName" ""
"{7943C44E-7D44-422A-9140-4CF55C88F7D3}DifferenceCtrlViews" "0"
"{855C64C3-E49C-4450-9BCA-C9822566D214}OSObjectCtrlViews" "0"
"{8A898260-6F1D-11D5-8EB6-00004CC34E9D}ECX_WAVE" "00000000,00000000,0,0"
"{8A898260-6F1D-11D5-8EB6-00004CC34E9D}ECX_WAVE_ADDRESS_NAME" ""
"{8A898260-6F1D-11D5-8EB6-00004CC34E9D}ECX_WAVE_COMB_ADDRESS" ",,,,"
"{8A898260-6F1D-11D5-8EB6-00004CC34E9D}ECX_WAVE_COMB_BUFFER" ",,,,"
"{8A898260-6F1D-11D5-8EB6-00004CC34E9D}ECX_WAVE_SAMPLING_RATE" "1000"
"{8A898260-6F1D-11D5-8EB6-00004CC34E9D}WaveformCtrlViews" "0"
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersCtrlViews" "1"
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWnd0ColumnWidth" "47,153,35"
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWnd0ECX_REGISTER_COUNT" "33"
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWnd0ECX_REGISTER_DISPLAYED" "1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1"
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWnd0HideFLAGs" "0"
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWnd0HideRadix" "0"
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWnd0LastFileName" ""
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWnd0RadixList" "16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,2,16,16,16,16,16,16,16,"
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWndInstanceKey0" "{WK_00000001_REGISTERS}RTOSDemoDefaultSession"
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWndViewB0ColumnWidth" "47,153,35"
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWndViewB0ECX_REGISTER_COUNT" "33"
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWndViewB0ECX_REGISTER_DISPLAYED" "1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1"
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWndViewB0HideFLAGs" "0"
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWndViewB0HideRadix" "0"
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWndViewB0LastFileName" ""
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWndViewB0RadixList" "16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,2,16,16,16,16,16,16,16,"
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWndViewBInstanceKey0" "{WK_00000001_REGISTERS}RTOSDemoDefaultSessionViewB"
"{AC411480-6F0A-11D5-8EB6-00004CC34E9D}ECX_IMAGE_ADDRESS_NAME" ""
"{AC411480-6F0A-11D5-8EB6-00004CC34E9D}ECX_IMAGE_BUFFER" "00000000,00000000,0,0"
"{AC411480-6F0A-11D5-8EB6-00004CC34E9D}ECX_IMAGE_COLOR" "0,0,0,0"
"{AC411480-6F0A-11D5-8EB6-00004CC34E9D}ECX_IMAGE_COMB_ADDRESS" ",,,,"
"{AC411480-6F0A-11D5-8EB6-00004CC34E9D}ECX_IMAGE_COMB_PALETTE" ",,,,"
"{AC411480-6F0A-11D5-8EB6-00004CC34E9D}ECX_IMAGE_PALETTE_NAME" ""
"{AC411480-6F0A-11D5-8EB6-00004CC34E9D}ECX_IMAGE_REDRAW_CONTINUOUSLY" "0,2"
"{AC411480-6F0A-11D5-8EB6-00004CC34E9D}ECX_IMAGE_SAMPLEING_RATE" "1000"
"{AC411480-6F0A-11D5-8EB6-00004CC34E9D}ECX_IMAGE_VIEW" "0,0,0,0,0,0"
"{AC411480-6F0A-11D5-8EB6-00004CC34E9D}ImageCtrlViews" "0"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchCtrlViews" "4"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ColWidth0" "255"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ColWidth1" "150"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ColWidth12" "200"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ColWidth2" "120"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ColWidth3" "200"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ECX_WATCH_ITEM0000" "ulRegTest2CycleCount, 2, 0, P, Col, Hex, MN"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ECX_WATCH_ITEM0000_SCOPE" "Current Scope,"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ECX_WATCH_ITEM0001" "ulRegTest1CycleCount, 2, 0, P, Col, Hex, MN"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ECX_WATCH_ITEM0001_SCOPE" "Current Scope,"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ECX_WATCH_ITEM0002" "ulIdleLoopCount, 2, 0, P, Col, Hex, MN"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ECX_WATCH_ITEM0002_SCOPE" "Current Scope,"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ECX_WATCH_ITEM0003" "xEnd, 10, 0, P, Col, Hex, N"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ECX_WATCH_ITEM0003_SCOPE" "Current Scope,"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ECX_WATCH_ITEM0004" "pxNewBlockLink, 10, 0, P, Col, Hex, N"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ECX_WATCH_ITEM0004_SCOPE" "Current Scope,"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ECX_WATCH_ITEMCnt" "3"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd1ColWidth0" "120"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd1ColWidth1" "150"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd1ColWidth12" "200"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd1ColWidth2" "120"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd1ColWidth3" "200"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd1ECX_WATCH_ITEMCnt" "0"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd2ColWidth0" "120"
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"{WK_00000001_OUTPUT}" "WINDOW" 59422 0 0 "0.57" 306 560 340 350 200 18 0 "36756|36757|36758|36759|<<separator>>|36746|36747|<<separator>>|39531|<<separator>>|39500|39534|<<separator>>|36687" "0.0"
"{WK_00000001_REGISTERS}RTOSDemoDefaultSession" "WINDOW" 59421 0 0 "1.00" 307 0 0 350 200 18 0 "" "0.0"
"{WK_00000001_WATCH}RTOSDemoDefaultSession" "WINDOW" 59422 0 1 "0.43" 306 0 0 853 610 18 0 "32781|32783|<<separator>>|32771|32829|32772|32827|32773|<<separator>>|32786|<<separator>>|32810|32811" "0.0"
"{WK_00000002_WORKSPACE}" "WINDOW" 59420 0 0 "1.00" 342 560 340 350 200 18 0 "" "0.0"
"{WK_TB00000001_STANDARD}" "TOOLBAR 0" 59419 0 2 "0.00" 0 0 0 0 0 18 0 "" "0.0"
"{WK_TB00000002_EDITOR}" "TOOLBAR 0" 59419 0 0 "0.00" 0 0 0 0 0 18 0 "" "0.0"
"{WK_TB00000003_BOOKMARKS}" "TOOLBAR 0" 59419 1 1 "0.00" 0 0 0 0 0 17 0 "" "0.0"
"{WK_TB00000004_TEMPLATES}" "TOOLBAR 0" 59419 1 0 "0.00" 0 0 0 0 0 17 0 "" "0.0"
"{WK_TB00000005_SEARCH}" "TOOLBAR 0" 59419 0 1 "0.00" 0 0 0 0 0 18 0 "" "0.0"
"{WK_TB00000007_DEBUG}" "TOOLBAR 0" 59419 2 0 "0.00" 0 0 0 0 0 18 0 "" "0.0"
"{WK_TB00000008_DEBUGRUN}" "TOOLBAR 0" 59419 2 1 "0.00" 0 0 0 0 0 18 0 "" "0.0"
"{WK_TB00000009_VERSIONCONTROL}" "TOOLBAR 0" 59419 1 3 "0.00" 0 0 0 0 0 17 0 "" "0.0"
"{WK_TB00000011_CPU}" "TOOLBAR 0" 59419 2 2 "0.00" 0 0 0 0 0 18 0 "" "0.0"
"{WK_TB00000012_MAP}" "TOOLBAR 0" 59419 1 4 "0.00" 0 0 0 0 0 17 0 "" "0.0"
"{WK_TB00000013_SYMBOL}" "TOOLBAR 0" 59419 2 5 "0.00" 0 0 0 0 0 18 0 "" "0.0"
"{WK_TB00000014_CODE}" "TOOLBAR 0" 59419 2 9 "0.00" 0 0 0 0 0 17 0 "" "0.0"
"{WK_TB00000015_PERFORMANCE}" "TOOLBAR 0" 59419 2 10 "0.00" 0 0 0 0 0 17 0 "" "0.0"
"{WK_TB00000016_GRAPHIC}" "TOOLBAR 0" 59419 2 8 "0.00" 0 0 0 0 0 17 0 "" "0.0"
"{WK_TB00000018_DEFAULTWINDOW}" "TOOLBAR 0" 59419 1 2 "0.00" 0 0 0 0 0 17 0 "" "0.0"
"{WK_TB00000023_RTOS}" "TOOLBAR 0" 59419 2 11 "0.00" 0 0 0 0 0 17 0 "" "0.0"
"{WK_TB00000025_HELPSYSTEMTOOL}" "TOOLBAR 0" 59419 2 4 "0.00" 0 0 0 0 0 18 0 "" "0.0"
"{WK_TB00000026_MACRO}" "TOOLBAR 0" 59419 1 6 "0.00" 0 0 0 0 0 17 0 "" "0.0"
"{WK_TB00000027_EVENT}" "TOOLBAR 0" 59419 2 7 "0.00" 0 0 0 0 0 17 0 "" "0.0"
"{WK_TB00000028_RTOSDEBUG}" "TOOLBAR 0" 59419 2 3 "0.00" 0 0 0 0 0 17 0 "" "0.0"
"{WK_TB00000029_SYSTEMTOOL}" "TOOLBAR 0" 59419 2 6 "0.00" 0 0 0 0 0 17 0 "" "0.0"
[WINDOW_POSITION_STATE_DATA_VD2]
[WINDOW_POSITION_STATE_DATA_VD3]
[WINDOW_POSITION_STATE_DATA_VD4]
[WINDOW_Z_ORDER]
"C:\E\Dev\FreeRTOS\WorkingCopy\Source\portable\GCC\RX600\port_asm.asm"
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-MDK_GNURX\RTOSDemo\GNU-Files\start.asm"
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-MDK_GNURX\RTOSDemo\main-full.c"
"C:\E\Dev\FreeRTOS\WorkingCopy\Source\portable\GCC\RX600\port.c"
"C:\E\Dev\FreeRTOS\WorkingCopy\Source\tasks.c"
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-MDK_GNURX\RTOSDemo\RegTest.asm"
"C:\E\Dev\FreeRTOS\WorkingCopy\Source\portable\GCC\RX600\portmacro.h"
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-MDK_GNURX\RTOSDemo\FreeRTOSConfig.h"
"C:\E\Dev\FreeRTOS\WorkingCopy\Source\portable\MemMang\heap_2.c"
"C:\E\Dev\FreeRTOS\WorkingCopy\Source\list.c"
[TARGET_NAME]
"RX600 E1/E20 SYSTEM" "" 0
[STATUSBAR_STATEINFO_VD1]
"MasterShowState" 1
"ApplicationShowState" 1
"DebuggerShowState" 1
[STATUSBAR_STATEINFO_VD2]
"MasterShowState" 1
"ApplicationShowState" 1
"DebuggerShowState" 1
[STATUSBAR_STATEINFO_VD3]
"MasterShowState" 1
"ApplicationShowState" 1
"DebuggerShowState" 1
[STATUSBAR_STATEINFO_VD4]
"MasterShowState" 1
"ApplicationShowState" 1
"DebuggerShowState" 1
[STATUSBAR_DEBUGGER_PANESTATE_VD1]
"SBK_TAR_EMUE100|Exception" 1
"SBK_TAR_EMUE100|BreakCondition" 1
"SBK_TAR_EMUE100|TaskID" 1
"SBK_TAR_EMUE100|PC" 1
"SBK_TAR_EMUE100|ExecutionTime" 1
[STATUSBAR_DEBUGGER_PANESTATE_VD2]
[STATUSBAR_DEBUGGER_PANESTATE_VD3]
[STATUSBAR_DEBUGGER_PANESTATE_VD4]
[DEBUGGER_OPTIONS]
""
[DOWNLOAD_MODULES]
"$(CONFIGDIR)\$(PROJECTNAME).x" 0 "Elf/Dwarf2_KPIT" 0 1 1 0
[CONNECT_ON_GO]
"FALSE"
[DOWNLOAD_MODULES_AFTER_BUILD]
"TRUE"
[REMOVE_BREAKPOINTS_ON_DOWNLOAD]
"FALSE"
[DISABLE_MEMORY_ACCESS_PRIOR_TO_COMMAND_FILE_EXECUTION]
"FALSE"
[LIMIT_DISASSEMBLY_MEMORY_ACCESS]
"FALSE"
[DISABLE_MEMORY_ACCESS_DURING_EXECUTION]
"FALSE"
[DEBUGGER_OPTIONS_PROPERTIES]
"1"
[COMMAND_FILES]
[DEFAULT_DEBUG_FORMAT]
"Elf/Dwarf2_KPIT"
[FLASH_DETAILS]
"" 0 0 "" 0 "" 0 0 "" 0 0 0 0 0 0 0 "" "" "" "" ""
[BREAKPOINTS]
"c:\e\dev\freertos\workingcopy\demo\rx600_rx62n-mdk_gnurx\rtosdemo\main-full.c" 298 -510103 1 "{00000000-0000-0000-C000-000000000046}" ""
"c:\e\dev\freertos\workingcopy\demo\rx600_rx62n-mdk_gnurx\rtosdemo\main-full.c" 581 33414224 1 "{00000000-0000-0000-C000-000000000046}" ""
"c:\e\dev\freertos\workingcopy\demo\rx600_rx62n-mdk_gnurx\rtosdemo\regtest.asm" 144 -524093 1 "{00000000-0000-0000-C000-000000000046}" ""
"c:\e\dev\freertos\workingcopy\demo\rx600_rx62n-mdk_gnurx\rtosdemo\regtest.asm" 222 -523943 1 "{00000000-0000-0000-C000-000000000046}" ""
"c:\e\dev\freertos\workingcopy\source\portable\gcc\rx600\port.c" 255 -511337 1 "{00000000-0000-0000-C000-000000000046}" ""
"" -1 -523932 1 "{110BABEB-6DCB-4265-8236-8888EECAB6AB}" ""
"" -1 -509967 1 "{110BABEB-6DCB-4265-8236-8888EECAB6AB}" ""
[END]

@ -0,0 +1,30 @@
[Init_DeviceSetting]
DebugMode=0
PowerOut=0
ResetRelease=0
EmulatorSerial=
McuGroup=RX62N Group
Device=R5F562N8
McuFileDir=RX62NGr
SupplyVoltage=-1
[Init_CommunicationClock]
JtagClock=16.5
JtagClockValue=10
[Init_EmulatorSetting]
FirstStartUp=0
HideNext=0
ConnectionDlgAutoClose=1
[CFG_MCU]
PrevDevice=R5F562N8
ProcessorMode=0
EXTAL=12.0000
WorkRam=0x17000
[CFG_SYSTEM]
CpuReWrite=0
PerfCounterUser=0
TraceDebugAs=0
[CFG_FLASHCLEAR_R5F562N8_00]
BlockCount=54
BlockData=000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
[Config_Property]
HideNext=0

@ -0,0 +1,153 @@
/*
FreeRTOS V6.0.5 - Copyright (C) 2010 Real Time Engineers Ltd.
***************************************************************************
* *
* If you are: *
* *
* + New to FreeRTOS, *
* + Wanting to learn FreeRTOS or multitasking in general quickly *
* + Looking for basic training, *
* + Wanting to improve your FreeRTOS skills and productivity *
* *
* then take a look at the FreeRTOS eBook *
* *
* "Using the FreeRTOS Real Time Kernel - a Practical Guide" *
* http://www.FreeRTOS.org/Documentation *
* *
* A pdf reference manual is also available. Both are usually delivered *
* to your inbox within 20 minutes to two hours when purchased between 8am *
* and 8pm GMT (although please allow up to 24 hours in case of *
* exceptional circumstances). Thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
***NOTE*** The exception to the GPL is included to allow you to distribute
a combined work that includes FreeRTOS without being obliged to provide the
source code for proprietary components outside of the FreeRTOS kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
1 tab == 4 spaces!
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
#ifndef FREERTOS_CONFIG_H
#define FREERTOS_CONFIG_H
/* Board specifics. */
#include "yrdkrx62ndef.h"
/*-----------------------------------------------------------
* Application specific definitions.
*
* These definitions should be adjusted for your particular hardware and
* application requirements.
*
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
*
* See http://www.freertos.org/a00110.html.
*----------------------------------------------------------*/
#define configUSE_PREEMPTION 1
#define configUSE_IDLE_HOOK 0
#define configUSE_TICK_HOOK 0
#define configCPU_CLOCK_HZ ( ICLK_FREQUENCY ) /* Set in rskrx62ndef.h. */
#define configPERIPHERAL_CLOCK_HZ ( PCLK_FREQUENCY ) /* Set in rskrx62ndef.h. */
#define configTICK_RATE_HZ ( ( portTickType ) 1000 )
#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 140 )
#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 45 * 1024 ) )
#define configMAX_TASK_NAME_LEN ( 12 )
#define configUSE_TRACE_FACILITY 1
#define configUSE_16_BIT_TICKS 0
#define configIDLE_SHOULD_YIELD 1
#define configUSE_CO_ROUTINES 0
#define configUSE_MUTEXES 1
#define configGENERATE_RUN_TIME_STATS 1
#define configCHECK_FOR_STACK_OVERFLOW 2
#define configUSE_RECURSIVE_MUTEXES 1
#define configQUEUE_REGISTRY_SIZE 0
#define configUSE_MALLOC_FAILED_HOOK 1
#define configUSE_APPLICATION_TASK_TAG 0
#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 7 )
#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
/* The interrupt priority used by the kernel itself for the tick interrupt and
the pended interrupt. This would normally be the lowest priority. */
#define configKERNEL_INTERRUPT_PRIORITY 1
/* The maximum interrupt priority from which FreeRTOS API calls can be made.
Interrupts that use a priority above this will not be effected by anything the
kernel is doing. */
#define configMAX_SYSCALL_INTERRUPT_PRIORITY 4
/* Set the following definitions to 1 to include the API function, or zero
to exclude the API function. */
#define INCLUDE_vTaskPrioritySet 1
#define INCLUDE_uxTaskPriorityGet 1
#define INCLUDE_vTaskDelete 1
#define INCLUDE_vTaskCleanUpResources 0
#define INCLUDE_vTaskSuspend 1
#define INCLUDE_vTaskDelayUntil 1
#define INCLUDE_vTaskDelay 1
#define INCLUDE_uxTaskGetStackHighWaterMark 1
#define INCLUDE_xTaskGetSchedulerState 1
extern volatile unsigned long ulHighFrequencyTickCount;
#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() portNOP() /* Run time stats use the same timer as the high frequency timer test. */
#define portGET_RUN_TIME_COUNTER_VALUE() ulHighFrequencyTickCount
/* Override some of the priorities set in the common demo tasks. This is
required to ensure flase positive timing errors are not reported. */
#define bktPRIMARY_PRIORITY ( configMAX_PRIORITIES - 2 )
#define bktSECONDARY_PRIORITY ( configMAX_PRIORITIES - 3 )
/*-----------------------------------------------------------
* Ethernet configuration.
*-----------------------------------------------------------*/
/* MAC address configuration. */
#define configMAC_ADDR0 0x00
#define configMAC_ADDR1 0x12
#define configMAC_ADDR2 0x13
#define configMAC_ADDR3 0x10
#define configMAC_ADDR4 0x15
#define configMAC_ADDR5 0x11
/* IP address configuration. */
#define configIP_ADDR0 192
#define configIP_ADDR1 168
#define configIP_ADDR2 0
#define configIP_ADDR3 200
/* Netmask configuration. */
#define configNET_MASK0 255
#define configNET_MASK1 255
#define configNET_MASK2 255
#define configNET_MASK3 0
#endif /* FREERTOS_CONFIG_H */

@ -0,0 +1,55 @@
/***********************************************************************/
/* */
/* FILE :hwinit.c */
/* DATE :Wed, Aug 25, 2010 */
/* DESCRIPTION :Hardware Setup file */
/* CPU TYPE :Other */
/* */
/* This file is generated by KPIT GNU Project Generator. */
/* */
/***********************************************************************/
#include "iodefine.h"
#ifdef __cplusplus
extern "C" {
#endif
extern void hw_initialise(void);
#ifdef __cplusplus
}
#endif
void hw_initialise(void)
{
/*
SCI.SMR.BYTE = 0;
SCI.SMR.BIT.CA = 1;
SCI.SMR.BIT.CHR = 1;
SCI.SMR.BIT.OE = 1;
SCI.SMR.BIT.STOP = 1;
SCI.SMR.BIT.MP = 1;
SCI.SMR.BIT.CKS = 3;
SCI.BRR = 0;
SCI.SCR.BYTE = 0;
SCI.SCR.BIT.TIE = 1;
SCI.SCR.BIT.RIE = 1;
SCI.SCR.BIT.TE = 1;
SCI.SCR.BIT.RE = 1;
SCI.SCR.BIT.MPIE = 1;
SCI.SCR.BIT.TEIE = 1;
SCI.SCR.BIT.CKE = 3;
SCI.TDR = 0;
SCI.SSR.BYTE = 0;
SCI.SSR.BIT.TDRE = 1;
SCI.SSR.BIT.RDRF = 1;
SCI.SSR.BIT.ORER = 1;
SCI.SSR.BIT.FER = 1;
SCI.SSR.BIT.PER = 1;
SCI.SSR.BIT.TEND = 1;
SCI.SSR.BIT.MPB = 1;
SCI.SSR.BIT.MPBT = 1;
SCI.RDR = 0;
*/
}

@ -0,0 +1,431 @@
/***********************************************************************/
/* */
/* FILE :inthandler.c */
/* DATE :Wed, Aug 25, 2010 */
/* DESCRIPTION :Interrupt Handler */
/* CPU TYPE :Other */
/* */
/* This file is generated by KPIT GNU Project Generator. */
/* */
/***********************************************************************/
#include "inthandler.h"
// Exception(Supervisor Instruction)
void INT_Excep_SuperVisorInst(void){/* brk(); */}
// Exception(Undefined Instruction)
void INT_Excep_UndefinedInst(void){ __asm volatile ("brk"); }
// Exception(Floating Point)
void INT_Excep_FloatingPoint(void){/* brk(); */}
// NMI
void INT_NonMaskableInterrupt(void){/* brk(); */}
// Dummy
void Dummy(void){/* brk(); */}
// BRK
void INT_Excep_BRK(void){ /*wait(); */}
// BUSERR
void INT_Excep_BUSERR(void){ }
// FCU_FCUERR
void INT_Excep_FCU_FCUERR(void){ }
// FCU_FRDYI
void INT_Excep_FCU_FRDYI(void){ }
// CMTU0_CMT0 - (RB) NOTE This has been replaced in the vector table with vTickISR().
void INT_Excep_CMTU0_CMT0(void){ }
// CMTU0_CMT1
void INT_Excep_CMTU0_CMT1(void){ }
// CMTU1_CMT2
void INT_Excep_CMTU1_CMT2(void){ }
// CMTU1_CMT3
void INT_Excep_CMTU1_CMT3(void){ }
// IRQ0
void INT_Excep_IRQ0(void){ }
// IRQ1
void INT_Excep_IRQ1(void){ }
// IRQ2
void INT_Excep_IRQ2(void){ }
// IRQ3
void INT_Excep_IRQ3(void){ }
// IRQ4
void INT_Excep_IRQ4(void){ }
// IRQ5
void INT_Excep_IRQ5(void){ }
// IRQ6
void INT_Excep_IRQ6(void){ }
// IRQ7
void INT_Excep_IRQ7(void){ }
// IRQ8
void INT_Excep_IRQ8(void){ }
// IRQ9
void INT_Excep_IRQ9(void){ }
// IRQ10
void INT_Excep_IRQ10(void){ }
// IRQ11
void INT_Excep_IRQ11(void){ }
// IRQ12
void INT_Excep_IRQ12(void){ }
// IRQ13
void INT_Excep_IRQ13(void){ }
// IRQ14
void INT_Excep_IRQ14(void){ }
// IRQ15
void INT_Excep_IRQ15(void){ }
// WDT_WOVI
void INT_Excep_WDT_WOVI(void){ }
// AD0_ADI0
void INT_Excep_AD0_ADI0(void){ }
// AD1_ADI1
void INT_Excep_AD1_ADI1(void){ }
// AD2_ADI2
void INT_Excep_AD2_ADI2(void){ }
// AD3_ADI3
void INT_Excep_AD3_ADI3(void){ }
// TPU0_TGI0A
void INT_Excep_TPU0_TGI0A(void){ }
// TPU0_TGI0B
void INT_Excep_TPU0_TGI0B(void){ }
// TPU0_TGI0C
void INT_Excep_TPU0_TGI0C(void){ }
// TPU0_TGI0D
void INT_Excep_TPU0_TGI0D(void){ }
// TPU0_TCI0V
void INT_Excep_TPU0_TCI0V(void){ }
// TPU1_TGI1A
void INT_Excep_TPU1_TGI1A(void){ }
// TPU1_TGI1B
void INT_Excep_TPU1_TGI1B(void){ }
// TPU1_TCI1V
void INT_Excep_TPU1_TCI1V(void){ }
// TPU1_TCI1U
void INT_Excep_TPU1_TCI1U(void){ }
// TPU2_TGI2A
void INT_Excep_TPU2_TGI2A(void){ }
// TPU2_TGI2B
void INT_Excep_TPU2_TGI2B(void){ }
// TPU2_TCI2V
void INT_Excep_TPU2_TCI2V(void){ }
// TPU2_TCI2U
void INT_Excep_TPU2_TCI2U(void){ }
// TPU3_TGI3A
void INT_Excep_TPU3_TGI3A(void){ }
// TPU3_TGI3B
void INT_Excep_TPU3_TGI3B(void){ }
// TPU3_TGI3C
void INT_Excep_TPU3_TGI3C(void){ }
// TPU3_TGI3D
void INT_Excep_TPU3_TGI3D(void){ }
// TPU3_TCI3V
void INT_Excep_TPU3_TCI3V(void){ }
// TPU4_TGI4A
void INT_Excep_TPU4_TGI4A(void){ }
// TPU4_TGI4B
void INT_Excep_TPU4_TGI4B(void){ }
// TPU4_TCI4V
void INT_Excep_TPU4_TCI4V(void){ }
// TPU4_TCI4U
void INT_Excep_TPU4_TCI4U(void){ }
// TPU5_TGI5A
void INT_Excep_TPU5_TGI5A(void){ }
// TPU5_TGI5B
void INT_Excep_TPU5_TGI5B(void){ }
// TPU5_TCI5V
void INT_Excep_TPU5_TCI5V(void){ }
// TPU5_TCI5U
void INT_Excep_TPU5_TCI5U(void){ }
// TPU6_TGI6A
void INT_Excep_TPU6_TGI6A(void){ }
// TPU6_TGI6B
void INT_Excep_TPU6_TGI6B(void){ }
// TPU6_TGI6C
void INT_Excep_TPU6_TGI6C(void){ }
// TPU6_TGI6D
void INT_Excep_TPU6_TGI6D(void){ }
// TPU6_TCI6V
void INT_Excep_TPU6_TCI6V(void){ }
// TPU7_TGI7A
void INT_Excep_TPU7_TGI7A(void){ }
// TPU7_TGI7B
void INT_Excep_TPU7_TGI7B(void){ }
// TPU7_TCI7V
void INT_Excep_TPU7_TCI7V(void){ }
// TPU7_TCI7U
void INT_Excep_TPU7_TCI7U(void){ }
// TPU8_TGI8A
void INT_Excep_TPU8_TGI8A(void){ }
// TPU8_TGI8B
void INT_Excep_TPU8_TGI8B(void){ }
// TPU8_TCI8V
void INT_Excep_TPU8_TCI8V(void){ }
// TPU8_TCI8U
void INT_Excep_TPU8_TCI8U(void){ }
// TPU9_TGI9A
void INT_Excep_TPU9_TGI9A(void){ }
// TPU9_TGI9B
void INT_Excep_TPU9_TGI9B(void){ }
// TPU9_TGI9C
void INT_Excep_TPU9_TGI9C(void){ }
// TPU9_TGI9D
void INT_Excep_TPU9_TGI9D(void){ }
// TPU9_TCI9V
void INT_Excep_TPU9_TCI9V(void){ }
// TPU10_TGI10A
void INT_Excep_TPU10_TGI10A(void){ }
// TPU10_TGI10B
void INT_Excep_TPU10_TGI10B(void){ }
// TPU10_TCI10V
void INT_Excep_TPU10_TCI10V(void){ }
// TPU10_TCI10U
void INT_Excep_TPU10_TCI10U(void){ }
// TPU11_TGI11A
void INT_Excep_TPU11_TGI11A(void){ }
// TPU11_TGI11B
void INT_Excep_TPU11_TGI11B(void){ }
// TPU11_TCI11V
void INT_Excep_TPU11_TCI11V(void){ }
// TPU11_TCI11U
void INT_Excep_TPU11_TCI11U(void){ }
// TMR0_CMI0A
void INT_Excep_TMR0_CMI0A(void){ }
// TMR0_CMI0B
void INT_Excep_TMR0_CMI0B(void){ }
// TMR0_OV0I
void INT_Excep_TMR0_OV0I(void){ }
// TMR1_CMI1A
void INT_Excep_TMR1_CMI1A(void){ }
// TMR1_CMI1B
void INT_Excep_TMR1_CMI1B(void){ }
// TMR1_OV1I
void INT_Excep_TMR1_OV1I(void){ }
// TMR2_CMI2A
void INT_Excep_TMR2_CMI2A(void){ }
// TMR2_CMI2B
void INT_Excep_TMR2_CMI2B(void){ }
// TMR2_OV2I
void INT_Excep_TMR2_OV2I(void){ }
// TMR3_CMI3A
void INT_Excep_TMR3_CMI3A(void){ }
// TMR3_CMI3B
void INT_Excep_TMR3_CMI3B(void){ }
// TMR3_OV3I
void INT_Excep_TMR3_OV3I(void){ }
// DMAC_DMTEND0
void INT_Excep_DMAC_DMTEND0(void){ }
// DMAC_DMTEND1
void INT_Excep_DMAC_DMTEND1(void){ }
// DMAC_DMTEND2
void INT_Excep_DMAC_DMTEND2(void){ }
// DMAC_DMTEND3
void INT_Excep_DMAC_DMTEND3(void){ }
// SCI0_ERI0
void INT_Excep_SCI0_ERI0(void){ }
// SCI0_RXI0
void INT_Excep_SCI0_RXI0(void){ }
// SCI0_TXI0
void INT_Excep_SCI0_TXI0(void){ }
// SCI0_TEI0
void INT_Excep_SCI0_TEI0(void){ }
// SCI1_ERI1
void INT_Excep_SCI1_ERI1(void){ }
// SCI1_RXI1
void INT_Excep_SCI1_RXI1(void){ }
// SCI1_TXI1
void INT_Excep_SCI1_TXI1(void){ }
// SCI1_TEI1
void INT_Excep_SCI1_TEI1(void){ }
// SCI2_ERI2
void INT_Excep_SCI2_ERI2(void){ }
// SCI2_RXI2
void INT_Excep_SCI2_RXI2(void){ }
// SCI2_TXI2
void INT_Excep_SCI2_TXI2(void){ }
// SCI2_TEI2
void INT_Excep_SCI2_TEI2(void){ }
// SCI3_ERI3
void INT_Excep_SCI3_ERI3(void){ }
// SCI3_RXI3
void INT_Excep_SCI3_RXI3(void){ }
// SCI3_TXI3
void INT_Excep_SCI3_TXI3(void){ }
// SCI3_TEI3
void INT_Excep_SCI3_TEI3(void){ }
// SCI4_ERI4
void INT_Excep_SCI4_ERI4(void){ }
// SCI4_RXI4
void INT_Excep_SCI4_RXI4(void){ }
// SCI4_TXI4
void INT_Excep_SCI4_TXI4(void){ }
// SCI4_TEI4
void INT_Excep_SCI4_TEI4(void){ }
// SCI5_ERI5
void INT_Excep_SCI5_ERI5(void){ }
// SCI5_RXI5
void INT_Excep_SCI5_RXI5(void){ }
// SCI5_TXI5
void INT_Excep_SCI5_TXI5(void){ }
// SCI5_TEI5
void INT_Excep_SCI5_TEI5(void){ }
// SCI6_ERI6
void INT_Excep_SCI6_ERI6(void){ }
// SCI6_RXI6
void INT_Excep_SCI6_RXI6(void){ }
// SCI6_TXI6
void INT_Excep_SCI6_TXI6(void){ }
// SCI6_TEI6
void INT_Excep_SCI6_TEI6(void){ }
// RIIC0_EEI0
void INT_Excep_RIIC0_EEI0(void){ }
// RIIC0_RXI0
void INT_Excep_RIIC0_RXI0(void){ }
// RIIC0_TXI0
void INT_Excep_RIIC0_TXI0(void){ }
// RIIC0_TEI0
void INT_Excep_RIIC0_TEI0(void){ }
// RIIC1_EEI1
void INT_Excep_RIIC1_EEI1(void){ }
// RIIC1_RXI1
void INT_Excep_RIIC1_RXI1(void){ }
// RIIC1_TXI1
void INT_Excep_RIIC1_TXI1(void){ }
// RIIC1_TEI1
void INT_Excep_RIIC1_TEI1(void){ }

@ -0,0 +1,94 @@
/*------------------------------------------------------------------------
|
FILE : start.asm |
DATE : Wed, Aug 25, 2010 |
DESCRIPTION : Reset Program |
CPU TYPE : Other |
|
This file is generated by KPIT GNU Project Generator (Ver.4.5). |
|
------------------------------------------------------------------------*/
/*Start.asm*/
.list
.section .text
.global _start /*global Start routine */
#ifdef CPPAPP
___dso_handle:
.global ___dso_handle
#endif
.extern _hw_initialise /*external Sub-routine to initialise Hardware*/
.extern _data
.extern _mdata
.extern _ebss
.extern _bss
.extern _edata
.extern _main
.extern _ustack
.extern _istack
.extern _rvectors
#if DEBUG
.extern _exit
#endif
_start:
/* initialise user stack pointer */
mvtc #_ustack,USP
/* initialise interrupt stack pointer */
mvtc #_istack,ISP
/* setup intb */
mvtc #_rvectors_start, intb /* INTERRUPT VECTOR ADDRESS definition */
/* setup FPSW */
mvtc #100h, fpsw
/* load data section from ROM to RAM */
mov #_mdata,r2 /* src ROM address of data section in R2 */
mov #_data,r1 /* dest start RAM address of data section in R1 */
mov #_edata,r3 /* end RAM address of data section in R3 */
sub r1,r3 /* size of data section in R3 (R3=R3-R1) */
smovf /* block copy R3 bytes from R2 to R1 */
/* bss initialisation : zero out bss */
mov #00h,r2 /* load R2 reg with zero */
mov #_ebss, r3 /* store the end address of bss in R3 */
mov #_bss, r1 /* store the start address of bss in R1 */
sub r1,r3 /* size of bss section in R3 (R3=R3-R1) */
sstr.b
/* call the hardware initialiser */
bsr.a _hw_initialise
nop
/* setup PSW */
// mvtc #10000h, psw /* Set Ubit & Ibit for PSW */
/* change PSW PM to user-mode */
// MVFC PSW,R1
// OR #00100000h,R1
// PUSH.L R1
// MVFC PC,R1
// ADD #10,R1
// PUSH.L R1
// RTE
// NOP
// NOP
/* start user program */
bsr.a _main
/* call to exit*/
_exit:
bsr.a _exit
.end

@ -0,0 +1,178 @@
/*
FreeRTOS V6.0.5 - Copyright (C) 2010 Real Time Engineers Ltd.
***************************************************************************
* *
* If you are: *
* *
* + New to FreeRTOS, *
* + Wanting to learn FreeRTOS or multitasking in general quickly *
* + Looking for basic training, *
* + Wanting to improve your FreeRTOS skills and productivity *
* *
* then take a look at the FreeRTOS eBook *
* *
* "Using the FreeRTOS Real Time Kernel - a Practical Guide" *
* http://www.FreeRTOS.org/Documentation *
* *
* A pdf reference manual is also available. Both are usually delivered *
* to your inbox within 20 minutes to two hours when purchased between 8am *
* and 8pm GMT (although please allow up to 24 hours in case of *
* exceptional circumstances). Thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
***NOTE*** The exception to the GPL is included to allow you to distribute
a combined work that includes FreeRTOS without being obliged to provide the
source code for proprietary components outside of the FreeRTOS kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
1 tab == 4 spaces!
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
/*
* High frequency timer test as described in main.c.
*/
/* Scheduler includes. */
#include "FreeRTOS.h"
/* Hardware specifics. */
#include "iodefine.h"
/* The set frequency of the interrupt. Deviations from this are measured as
the jitter. */
#define timerINTERRUPT_FREQUENCY ( 20000UL )
/* The expected time between each of the timer interrupts - if the jitter was
zero. */
#define timerEXPECTED_DIFFERENCE_VALUE ( ( unsigned short ) ( ( configPERIPHERAL_CLOCK_HZ / 8UL ) / timerINTERRUPT_FREQUENCY ) )
/* The highest available interrupt priority. */
#define timerHIGHEST_PRIORITY ( 15 )
/* Misc defines. */
#define timerTIMER_3_COUNT_VALUE ( *( ( unsigned short * ) 0x8801a ) ) /*( CMT3.CMCNT )*/
/*-----------------------------------------------------------*/
/* Interrupt wrapper and handler in which the jitter is measured. */
void vTimer2_ISR_Wrapper( void ) __attribute__((naked));
static void prvTimer2_ISR_Handler( void ) __attribute__((noinline));
/* Stores the value of the maximum recorded jitter between interrupts. This is
displayed on one of the served web pages. */
volatile unsigned short usMaxJitter = 0;
/* Counts the number of high frequency interrupts - used to generate the run
time stats. */
volatile unsigned long ulHighFrequencyTickCount = 0UL;
/*-----------------------------------------------------------*/
void vSetupHighFrequencyTimer( void )
{
/* Timer CMT2 is used to generate the interrupts, and CMT3 is used
to measure the jitter. */
/* Enable compare match timer 2 and 3. */
MSTP( CMT2 ) = 0;
MSTP( CMT3 ) = 0;
/* Interrupt on compare match. */
CMT2.CMCR.BIT.CMIE = 1;
/* Set the compare match value. */
CMT2.CMCOR = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / timerINTERRUPT_FREQUENCY ) -1 ) / 8 );
/* Divide the PCLK by 8. */
CMT2.CMCR.BIT.CKS = 0;
CMT3.CMCR.BIT.CKS = 0;
/* Enable the interrupt... */
_IEN( _CMT2_CMI2 ) = 1;
/* ...and set its priority to the maximum possible, this is above the priority
set by configMAX_SYSCALL_INTERRUPT_PRIORITY so will nest. */
_IPR( _CMT2_CMI2 ) = timerHIGHEST_PRIORITY;
/* Start the timers. */
CMT.CMSTR1.BIT.STR2 = 1;
CMT.CMSTR1.BIT.STR3 = 1;
}
/*-----------------------------------------------------------*/
void vTimer2_ISR_Wrapper( void )
{
portENTER_INTERRUPT();
prvTimer2_ISR_Handler();
portEXIT_INTERRUPT();
}
/*-----------------------------------------------------------*/
static void prvTimer2_ISR_Handler( void )
{
volatile unsigned short usCurrentCount;
static unsigned short usMaxCount = 0;
static unsigned long ulErrorCount = 0UL;
/* We use the timer 1 counter value to measure the clock cycles between
the timer 0 interrupts. First stop the clock. */
CMT.CMSTR1.BIT.STR3 = 0;
portNOP();
portNOP();
usCurrentCount = timerTIMER_3_COUNT_VALUE;
/* Is this the largest count we have measured yet? */
if( usCurrentCount > usMaxCount )
{
if( usCurrentCount > timerEXPECTED_DIFFERENCE_VALUE )
{
usMaxJitter = usCurrentCount - timerEXPECTED_DIFFERENCE_VALUE;
}
else
{
/* This should not happen! */
ulErrorCount++;
}
usMaxCount = usCurrentCount;
}
/* Used to generate the run time stats. */
ulHighFrequencyTickCount++;
/* Clear the timer. */
timerTIMER_3_COUNT_VALUE = 0;
/* Then start the clock again. */
CMT.CMSTR1.BIT.STR3 = 1;
}

@ -0,0 +1,170 @@
/*
FreeRTOS V6.0.5 - Copyright (C) 2010 Real Time Engineers Ltd.
***************************************************************************
* *
* If you are: *
* *
* + New to FreeRTOS, *
* + Wanting to learn FreeRTOS or multitasking in general quickly *
* + Looking for basic training, *
* + Wanting to improve your FreeRTOS skills and productivity *
* *
* then take a look at the FreeRTOS eBook *
* *
* "Using the FreeRTOS Real Time Kernel - a Practical Guide" *
* http://www.FreeRTOS.org/Documentation *
* *
* A pdf reference manual is also available. Both are usually delivered *
* to your inbox within 20 minutes to two hours when purchased between 8am *
* and 8pm GMT (although please allow up to 24 hours in case of *
* exceptional circumstances). Thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
***NOTE*** The exception to the GPL is included to allow you to distribute
a combined work that includes FreeRTOS without being obliged to provide the
source code for proprietary components outside of the FreeRTOS kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
1 tab == 4 spaces!
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
/*
* This file contains the non-portable and therefore RX62N specific parts of
* the IntQueue standard demo task - namely the configuration of the timers
* that generate the interrupts and the interrupt entry points.
*/
/* Scheduler includes. */
#include "FreeRTOS.h"
#include "task.h"
/* Demo includes. */
#include "IntQueueTimer.h"
#include "IntQueue.h"
/* Hardware specifics. */
#include "iodefine.h"
#define tmrTIMER_0_1_FREQUENCY ( 2000UL )
#define tmrTIMER_2_3_FREQUENCY ( 2001UL )
/* Wrappers and handlers for the two timers used. See the documentation page
for this port on http://www.FreeRTOS.org for more information on writing
interrupt handlers. */
void vT0_1_ISR_Wrapper( void ) __attribute((naked));
void vT2_3_ISR_Wrapper( void ) __attribute((naked));
void vInitialiseTimerForIntQueueTest( void )
{
/* Ensure interrupts do not start until full configuration is complete. */
portENTER_CRITICAL();
{
/* Cascade two 8bit timer channels to generate the interrupts.
8bit timer unit 1 (TMR0 and TMR1) and 8bit timer unit 2 (TMR2 and TMR3 are
utilised for this test. */
/* Enable the timers. */
SYSTEM.MSTPCRA.BIT.MSTPA5 = 0;
SYSTEM.MSTPCRA.BIT.MSTPA4 = 0;
/* Enable compare match A interrupt request. */
TMR0.TCR.BIT.CMIEA = 1;
TMR2.TCR.BIT.CMIEA = 1;
/* Clear the timer on compare match A. */
TMR0.TCR.BIT.CCLR = 1;
TMR2.TCR.BIT.CCLR = 1;
/* Set the compare match value. */
TMR01.TCORA = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / tmrTIMER_0_1_FREQUENCY ) -1 ) / 8 );
TMR23.TCORA = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / tmrTIMER_0_1_FREQUENCY ) -1 ) / 8 );
/* 16 bit operation ( count from timer 1,2 ). */
TMR0.TCCR.BIT.CSS = 3;
TMR2.TCCR.BIT.CSS = 3;
/* Use PCLK as the input. */
TMR1.TCCR.BIT.CSS = 1;
TMR3.TCCR.BIT.CSS = 1;
/* Divide PCLK by 8. */
TMR1.TCCR.BIT.CKS = 2;
TMR3.TCCR.BIT.CKS = 2;
/* Enable TMR 0, 2 interrupts. */
IEN( TMR0, CMIA0 ) = 1;
IEN( TMR2, CMIA2 ) = 1;
/* Set the timer interrupts to be above the kernel. The interrupts are
assigned different priorities so they nest with each other. */
IPR( TMR0, CMIA0 ) = configMAX_SYSCALL_INTERRUPT_PRIORITY - 1;
IPR( TMR2, CMIA2 ) = ( configMAX_SYSCALL_INTERRUPT_PRIORITY - 2 );
}
portEXIT_CRITICAL();
/* Ensure the interrupts are clear as they are edge detected. */
IR( TMR0, CMIA0 ) = 0;
IR( TMR2, CMIA2 ) = 0;
}
/*-----------------------------------------------------------*/
void vT0_1_ISR_Wrapper( void )
{
/* This is a naked function. This macro saves registers then re-enables
interrupts. See the documentation for htis port on http://www.FreeRTOS.org
for more information on writing interrupts. */
portENTER_INTERRUPT();
/* Call the handler that is part of the common code - this is where the
non-portable code ends and the actual test is performed. */
portYIELD_FROM_ISR( xFirstTimerHandler() );
/* Restore registers, then return. */
portEXIT_INTERRUPT();
}
/*-----------------------------------------------------------*/
void vT2_3_ISR_Wrapper( void )
{
/* This is a naked function. This macro saves registers then re-enables
interrupts. See the documentation for htis port on http://www.FreeRTOS.org
for more information on writing interrupts. */
portENTER_INTERRUPT();
/* Call the handler that is part of the common code - this is where the
non-portable code ends and the actual test is performed. */
portYIELD_FROM_ISR( xSecondTimerHandler() );
/* Restore registers, then return. */
portEXIT_INTERRUPT();
}
/*-----------------------------------------------------------*/

@ -0,0 +1,254 @@
/*
FreeRTOS V6.0.5 - Copyright (C) 2010 Real Time Engineers Ltd.
***************************************************************************
* *
* If you are: *
* *
* + New to FreeRTOS, *
* + Wanting to learn FreeRTOS or multitasking in general quickly *
* + Looking for basic training, *
* + Wanting to improve your FreeRTOS skills and productivity *
* *
* then take a look at the FreeRTOS eBook *
* *
* "Using the FreeRTOS Real Time Kernel - a Practical Guide" *
* http://www.FreeRTOS.org/Documentation *
* *
* A pdf reference manual is also available. Both are usually delivered *
* to your inbox within 20 minutes to two hours when purchased between 8am *
* and 8pm GMT (although please allow up to 24 hours in case of *
* exceptional circumstances). Thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
***NOTE*** The exception to the GPL is included to allow you to distribute
a combined work that includes FreeRTOS without being obliged to provide the
source code for proprietary components outside of the FreeRTOS kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
1 tab == 4 spaces!
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
/*-----------------------------------------------------------
* Simple IO routines to control the LEDs.
*-----------------------------------------------------------*/
/* Scheduler includes. */
#include "FreeRTOS.h"
#include "task.h"
/* Demo includes. */
#include "partest.h"
/* Hardware specifics. */
#include <iorx62n.h>
#define partestNUM_LEDS ( 12 )
long lParTestGetLEDState( unsigned long ulLED );
/*-----------------------------------------------------------*/
void vParTestInitialise( void )
{
/* Port pin configuration is done by the low level set up prior to this
function being called. */
}
/*-----------------------------------------------------------*/
void vParTestSetLED( unsigned long ulLED, signed long xValue )
{
if( ulLED < partestNUM_LEDS )
{
if( xValue != 0 )
{
/* Turn the LED on. */
taskENTER_CRITICAL();
{
switch( ulLED )
{
case 0: LED4 = LED_ON;
break;
case 1: LED5 = LED_ON;
break;
case 2: LED6 = LED_ON;
break;
case 3: LED7 = LED_ON;
break;
case 4: LED8 = LED_ON;
break;
case 5: LED9 = LED_ON;
break;
case 6: LED10 = LED_ON;
break;
case 7: LED11 = LED_ON;
break;
case 8: LED12 = LED_ON;
break;
case 9: LED13 = LED_ON;
break;
case 10:LED14 = LED_ON;
break;
case 11:LED15 = LED_ON;
break;
}
}
taskEXIT_CRITICAL();
}
else
{
/* Turn the LED off. */
taskENTER_CRITICAL();
{
switch( ulLED )
{
case 0: LED4 = LED_OFF;
break;
case 1: LED5 = LED_OFF;
break;
case 2: LED6 = LED_OFF;
break;
case 3: LED7 = LED_OFF;
break;
case 4: LED8 = LED_OFF;
break;
case 5: LED9 = LED_OFF;
break;
case 6: LED10 = LED_OFF;
break;
case 7: LED11 = LED_OFF;
break;
case 8: LED12 = LED_OFF;
break;
case 9: LED13 = LED_OFF;
break;
case 10:LED14 = LED_OFF;
break;
case 11:LED15 = LED_OFF;
break;
}
}
taskEXIT_CRITICAL();
}
}
}
/*-----------------------------------------------------------*/
void vParTestToggleLED( unsigned long ulLED )
{
if( ulLED < partestNUM_LEDS )
{
taskENTER_CRITICAL();
{
if( lParTestGetLEDState( ulLED ) != 0x00 )
{
vParTestSetLED( ulLED, 0 );
}
else
{
vParTestSetLED( ulLED, 1 );
}
}
taskEXIT_CRITICAL();
}
}
/*-----------------------------------------------------------*/
long lParTestGetLEDState( unsigned long ulLED )
{
long lReturn = pdFALSE;
if( ulLED < partestNUM_LEDS )
{
switch( ulLED )
{
case 0 : if( LED4 != 0 )
{
lReturn = pdTRUE;
}
break;
case 1 : if( LED5 != 0 )
{
lReturn = pdTRUE;
}
break;
case 2 : if( LED6 != 0 )
{
lReturn = pdTRUE;
}
break;
case 3 : if( LED7 != 0 )
{
lReturn = pdTRUE;
}
break;
case 4 : if( LED8 != 0 )
{
lReturn = pdTRUE;
}
break;
case 5 : if( LED9 != 0 )
{
lReturn = pdTRUE;
}
break;
case 6 : if( LED10 != 0 )
{
lReturn = pdTRUE;
}
break;
case 7 : if( LED11 != 0 )
{
lReturn = pdTRUE;
}
break;
case 8 : if( LED12 != 0 )
{
lReturn = pdTRUE;
}
break;
case 9 : if( LED13 != 0 )
{
lReturn = pdTRUE;
}
break;
case 10 : if( LED14 != 0 )
{
lReturn = pdTRUE;
}
break;
case 11 : if( LED15 != 0 )
{
lReturn = pdTRUE;
}
break;
}
}
return lReturn;
}
/*-----------------------------------------------------------*/

@ -0,0 +1,477 @@
[HIMDBVersion]
2.0
[DATABASE_VERSION]
"2.8"
[PROJECT_DETAILS]
"RTOSDemo" "C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RSK_GNURX\RTOSDemo" "C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RSK_GNURX\RTOSDemo\RTOSDemo.hwp" "RX" "KPIT GNURX [ELF]" "C Application" "RX600" "Other"
[INFORMATION]
"No project information available"
[TOOL_CHAIN]
"KPIT GNURX [ELF] Toolchain" "v10.02"
[CONFIGURATIONS]
"Blinky" "C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RSK_GNURX\RTOSDemo\Blinky"
"Debug" "C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RSK_GNURX\RTOSDemo\Debug"
"Debug_RX600_E1_E20_SYSTEM" "C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RSK_GNURX\RTOSDemo\Debug_RX600_E1_E20_SYSTEM"
"Debug_with_optimisation" "C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RSK_GNURX\RTOSDemo\Debug_with_optimisation"
[BUILD_PHASES]
"GNU Assembler" 1
"GNU Compiler" 1
"GNU Library Generator" 1
"GNU Linker" 1
[TOOL_ENVIRONMENT]
[EXTENSIONS]
"Absolute file" "ABS"
"Archive File" "A"
"Assembly include file" "INC"
"Assembly list file" "LIS"
"Assembly source file" "S"
"Assembly source file" "SRC"
"Binary file" "BIN"
"C header file" "H"
"C list file" "LST"
"C source file" "C"
"C++ header file" "HPP"
"C++ list file" "LPP"
"C++ source file" "CC"
"C++ source file" "CP"
"C++ source file" "CPP"
"CPU information file" "CPU"
"Calling information file" "CAL"
"Debug information file" "DBG"
"Expanded assembly source file" "EXP"
"Hex file" "HEX"
"Library file" "LIB"
"Library information file" "LBP"
"Linkage map file" "MAP"
"Object file" "OBJ"
"Optimize map file" "bls"
"Preprocess Assembly file" "ASM"
"Preprocessed C source file" "P"
"Preprocessed C++ source file" "PP"
"Profile file" "PRO"
"Relocatable file" "REL"
"Rts information file" "RTS"
"S-Record file" "MOT"
"Stack information file" "SNI"
"TD include object file" "RTI"
[FILE_GROUPS]
"Absolute file" "BIN" "NONE" ""
"Archive File" "BIN" "NONE" ""
"Assembly include file" "TEXT" "EDITOR" ""
"Assembly list file" "TEXT" "EDITOR" ""
"Assembly source file" "TEXT" "EDITOR" ""
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"" 0
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" 2
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" 1
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[OPTIONS_Debug_RX600_E1_E20_SYSTEM_GNU Library Generator]
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[OPTIONS_Debug_RX600_E1_E20_SYSTEM_GNU Linker]
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[OPTIONS_Debug_RX600_E1_E20_SYSTEM]
"" 0
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"[V|VERSION|2] [S|OUTPUTPATH|^"$(CONFIGDIR)\lib$(PROJECTNAME).a^"] [B|OPTIMIZE|1] [I|OPTTYPE|1] [S|MODE|BUILD/CHANGED] [S|CPUTYPE|RX600] [S|ENDIAN|LITTLE] [S|CPU|Other] [B|DOPROJBUILT|1] [B|DOOPTLIB|1] [B|MATH|1] [B|STDIO|1] [B|STDLIB|1] [B|STRING|1] " 1
"[V|VERSION|2] [S|OUTPUT|OBJECT] [S|OBJPATH|^"$(CONFIGDIR)\$(FILELEAF).o^"] [B|OPTIMIZE|0] [I|OPTLV|2] [B|DEBUG|1] [I|DEBUGLV|2] [S|DEBUGFT|Native] [S|DEFINES|DEBUG] [S|PROJECTTYPE|CAPPPROJECT] [S|CPUTYPE|RX600] [S|ENDIAN|LITTLE] [S|CPU|Other] [B|DOOPTLIB|1] [S|INCDIR|^"$(TCINSTALL)\rx-elf\rx-elf\optlibinc^"|^"$(TCINSTALL)\rx-elf\lib\gcc\rx-elf\4.5-GNURX_v10.02\optlibinc^"] [B|NOSTDINC|1] " 2
[EXCLUDED_FILES_Debug_RX600_E1_E20_SYSTEM]
[LINKAGE_ORDER_Debug_RX600_E1_E20_SYSTEM]
[GENERAL_DATA_CONFIGURATION_Debug_RX600_E1_E20_SYSTEM]
[OPTIONS_Debug_with_optimisation_GNU Assembler]
"Assembly source file" "0e2d0de05744bc10" 4
[OPTIONS_Debug_with_optimisation_GNU Compiler]
"C source file" "04d6979b5d95bc10" 2
"C++ source file" "04d6979b5d95bc10" 2
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"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\Common\Minimal\GenQTest.c" "04d6979b5d95bc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\Common\Minimal\IntQueue.c" "04d6979b5d95bc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\Common\Minimal\PollQ.c" "04d6979b5d95bc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\Common\Minimal\QPeek.c" "04d6979b5d95bc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\Common\Minimal\blocktim.c" "04d6979b5d95bc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\Common\Minimal\death.c" "04d6979b5d95bc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\Common\Minimal\flash.c" "04d6979b5d95bc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\Common\Minimal\flop.c" "04d6979b5d95bc10" 2
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"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\Common\Minimal\recmutex.c" "04d6979b5d95bc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\Common\Minimal\semtest.c" "04d6979b5d95bc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\Common\ethernet\FreeTCPIP\apps\httpd\http-strings.c" "04d6979b5d95bc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\Common\ethernet\FreeTCPIP\apps\httpd\httpd-fs.c" "04d6979b5d95bc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\Common\ethernet\FreeTCPIP\apps\httpd\httpd.c" "04d6979b5d95bc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\Common\ethernet\FreeTCPIP\psock.c" "04d6979b5d95bc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\Common\ethernet\FreeTCPIP\timer.c" "04d6979b5d95bc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\Common\ethernet\FreeTCPIP\uip.c" "04d6979b5d95bc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\Common\ethernet\FreeTCPIP\uip_arp.c" "04d6979b5d95bc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RSK_GNURX\RTOSDemo\GNU-Files\hwinit.c" "04d6979b5d95bc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RSK_GNURX\RTOSDemo\GNU-Files\inthandler.c" "04d6979b5d95bc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RSK_GNURX\RTOSDemo\GNU-Files\start.asm" "04d6979b5d95bc10" 3
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RSK_GNURX\RTOSDemo\HighFrequencyTimerTest.c" "04d6979b5d95bc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RSK_GNURX\RTOSDemo\IntQueueTimer.c" "04d6979b5d95bc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RSK_GNURX\RTOSDemo\ParTest.c" "04d6979b5d95bc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RSK_GNURX\RTOSDemo\Renesas-Files\hwsetup.c" "04d6979b5d95bc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RSK_GNURX\RTOSDemo\main-blinky.c" "04d6979b5d95bc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RSK_GNURX\RTOSDemo\main-full.c" "04d6979b5d95bc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RSK_GNURX\RTOSDemo\uIP_Task.c" "04d6979b5d95bc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RSK_GNURX\RTOSDemo\vects.c" "04d6979b5d95bc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RSK_GNURX\RTOSDemo\webserver\EMAC.c" "04d6979b5d95bc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RSK_GNURX\RTOSDemo\webserver\httpd-cgi.c" "04d6979b5d95bc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RSK_GNURX\RTOSDemo\webserver\phy.c" "04d6979b5d95bc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Source\list.c" "04d6979b5d95bc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Source\portable\GCC\RX600\port.c" "04d6979b5d95bc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Source\portable\MemMang\heap_2.c" "04d6979b5d95bc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Source\queue.c" "04d6979b5d95bc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Source\tasks.c" "04d6979b5d95bc10" 2
"Preprocess Assembly file" "04d6979b5d95bc10" 3
[OPTIONS_Debug_with_optimisation_GNU Library Generator]
"Single Shot" "0e2d0de05744bc10" 1
[OPTIONS_Debug_with_optimisation_GNU Linker]
"Single Shot" "07e9443483a5bc10" 5
[OPTIONS_Debug_with_optimisation]
"" 0
"[V|VERSION|2] [B|DOEXTF|1] [S|INCDIR|^"$(TCINSTALL)\rx-elf\lib\gcc\rx-elf\4.5-GNURX_v10.02^"|^"$(CONFIGDIR)^"] [B|RSARCH|1] [B|FIXUPLIBS|1] [S|ARCHIVE|lib$(PROJECTNAME).a*libgcc.a] [S|OUTFORM|BOTH] [B|MFILEGEN|1] [S|PLMFILE|^"$(CONFIGDIR)\$(PROJECTNAME).map^"] [S|OUTFILE|^"$(CONFIGDIR)\$(PROJECTNAME).x^"] [S|GROUPDET|.fvectors|0|0||1|0xFFFFFF80|0|1|0|.fvectors|All-files|<<FEND>>|<<CEND>>|<<GEND>>|.text|0|0||1|0xFFF80000|0|0|0|.text|All-files|<<FEND>>|0|.text.*|All-files|<<FEND>>|0|P|All-files|<<FEND>>|1|etext|<<FEND>>|<<CEND>>|<<GEND>>|.rvectors|0|0||0||0|1|1|_rvectors_start|<<FEND>>|0|.rvectors|All-files|<<FEND>>|1|_rvectors_end|<<FEND>>|<<CEND>>|<<GEND>>|.init|0|0||0||0|0|0|.init|All-files|<<FEND>>|<<CEND>>|<<GEND>>|.fini|0|0||0||0|0|0|.fini|All-files|<<FEND>>|<<CEND>>|<<GEND>>|.got|0|0||0||0|0|0|.got|All-files|<<FEND>>|0|.got.plt|All-files|<<FEND>>|<<CEND>>|<<GEND>>|.rodata|0|0||0||0|0|0|.rodata|All-files|<<FEND>>|0|.rodata.*|All-files|<<FEND>>|0|C_1|All-files|<<FEND>>|0|C_2|All-files|<<FEND>>|0|C|All-files|<<FEND>>|1|_erodata|<<FEND>>|<<CEND>>|<<GEND>>|.eh_frame_hdr|0|0||0||0|0|0|.eh_frame_hdr|All-files|<<FEND>>|<<CEND>>|<<GEND>>|.eh_frame|0|0||0||0|0|0|.eh_frame|All-files|<<FEND>>|<<CEND>>|<<GEND>>|.jcr|0|0||0||0|0|0|.jcr|All-files|<<FEND>>|<<CEND>>|<<GEND>>|.tors|0|0||0||0|0|1|__CTOR_LIST__|<<FEND>>|1|___ctors|<<FEND>>|0|.ctors|All-files|<<FEND>>|1|___ctors_end|<<FEND>>|1|__CTOR_END__|<<FEND>>|1|__DTOR_LIST__|<<FEND>>|1|___dtors|<<FEND>>|0|.dtors|All-files|<<FEND>>|1|___dtors_end|<<FEND>>|1|__DTOR_END__|<<FEND>>|1|_mdata|<<FEND>>|<<CEND>>|<<GEND>>|.istack|0|0||1|0x00017FFC|0|0|1|_istack|<<FEND>>|<<CEND>>|<<GEND>>|.ustack|0|0||1|0x000179BC|0|0|1|_ustack|<<FEND>>|<<CEND>>|<<GEND>>|.data|0|2|_mdata|1|0x00001000|0|0|1|_data|<<FEND>>|0|.data|All-files|<<FEND>>|0|.data.*|All-files|<<FEND>>|0|D|All-files|<<FEND>>|0|D_1|All-files|<<FEND>>|0|D_2|All-files|<<FEND>>|1|_edata|<<FEND>>|<<CEND>>|<<GEND>>|.gcc_exc|0|0||0||0|0|0|.gcc_exc|All-files|<<FEND>>|<<CEND>>|<<GEND>>|.bss|0|0||0||0|0|1|_bss|<<FEND>>|0|.bss|All-files|<<FEND>>|0|.bss.*|All-files|<<FEND>>|0|COMMON|All-files|<<FEND>>|0|B|All-files|<<FEND>>|0|B_1|All-files|<<FEND>>|0|B_2|All-files|<<FEND>>|1|_ebss|<<FEND>>|1|_end|<<FEND>>|<<CEND>>|<<GEND>>|] [S|APPTXT|^"-e _start^"] [S|CPUTYPE|RX600] [S|ENDIAN|LITTLE] [S|CPU|Other] [I|RMINTREGVAL|0] [I|RMMAXCONSTVAL|0] [I|RMMAXVARSVAL|0] [S|PROJECTTYPE|CAPPPROJECT] [B|DOOPTLIB|1] [B|DOPROJBUILT|1]
" 5
"[V|VERSION|2] [S|INCDIR|^"$(TCINSTALL)\rx-elf\rx-elf\optlibinc^"|^"$(TCINSTALL)\rx-elf\lib\gcc\rx-elf\4.5-GNURX_v10.02\optlibinc^"|^"$(PROJDIR)\include^"|^"$(PROJDIR)\..\..\..\Source\include^"|^"$(PROJDIR)\..\..\..\Source\portable\GCC\RX600^"|^"$(PROJDIR)^"|^"$(PROJDIR)\..\..\Common\include^"|^"$(PROJDIR)\..\..\Common\Ethernet\FreeTCPIP^"|^"$(PROJDIR)\webserver^"] [S|DEFINES|DEBUG|INCLUDE_HIGH_FREQUENCY_TIMER_TEST] [S|OUTPUT|OBJECT] [S|OBJPATH|^"$(CONFIGDIR)\$(FILELEAF).o^"] [B|DEBUG|1] [S|DEBUGFT|Native] [I|DEBUGLV|2] [S|ALIGN4|ALL] [B|OPTIMIZE|1] [I|OPTLV|1] [B|NOSTDINC|1] [S|APPTXT|^"-Wa,-gdwarf2^"] [S|CPUTYPE|RX600] [S|ENDIAN|LITTLE] [S|CPU|Other] [I|RMINTREGVAL|0] [I|RMMAXCONSTVAL|0] [I|RMMAXVARSVAL|0] [S|PROJECTTYPE|CAPPPROJECT] [B|DOOPTLIB|1]
" 3
"[V|VERSION|2] [S|INCDIR|^"$(TCINSTALL)\rx-elf\rx-elf\optlibinc^"|^"$(TCINSTALL)\rx-elf\lib\gcc\rx-elf\4.5-GNURX_v10.02\optlibinc^"|^"$(PROJDIR)\include^"|^"$(PROJDIR)\..\..\..\Source\include^"|^"$(PROJDIR)\..\..\..\Source\portable\GCC\RX600^"|^"$(PROJDIR)^"|^"$(PROJDIR)\..\..\Common\include^"|^"$(PROJDIR)\..\..\Common\Ethernet\FreeTCPIP^"|^"$(PROJDIR)\webserver^"] [S|DEFINES|DEBUG|INCLUDE_HIGH_FREQUENCY_TIMER_TEST] [S|OUTPUT|OBJECT] [S|OBJPATH|^"$(CONFIGDIR)\$(FILELEAF).o^"] [B|DEBUG|1] [S|DEBUGFT|Native] [I|DEBUGLV|2] [S|ALIGN4|ALL] [B|OPTIMIZE|1] [I|OPTLV|1] [B|NOSTDINC|1] [S|CPUTYPE|RX600] [S|ENDIAN|LITTLE] [S|CPU|Other] [I|RMINTREGVAL|0] [I|RMMAXCONSTVAL|0] [I|RMMAXVARSVAL|0] [S|PROJECTTYPE|CAPPPROJECT] [B|DOOPTLIB|1]
" 2
"[V|VERSION|2] [S|OBJPATH|^"$(CONFIGDIR)\$(FILELEAF).o^"] [I|DEBUGLV|2] [B|LINCHLS|1] [B|LINCASS|1] [B|LINCSYM|1] [S|LFILE|^"$(CONFIGDIR)\$(FILELEAF).^"] [S|PROJECTTYPE|CAPPPROJECT] [S|INCDIR|^"$(PROJDIR)^"] [S|CPUTYPE|RX600] [S|ENDIAN|LITTLE] [S|CPU|Other] " 4
"[V|VERSION|2] [S|OUTPUTPATH|^"$(CONFIGDIR)\lib$(PROJECTNAME).a^"] [B|OPTIMIZE|1] [I|OPTTYPE|1] [S|MODE|BUILD/CHANGED] [S|CPUTYPE|RX600] [S|ENDIAN|LITTLE] [S|CPU|Other] [B|DOPROJBUILT|1] [B|DOOPTLIB|1] [B|MATH|1] [B|STDIO|1] [B|STDLIB|1] [B|STRING|1] " 1
[EXCLUDED_FILES_Debug_with_optimisation]
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RSK_GNURX\RTOSDemo\main-blinky.c"
[LINKAGE_ORDER_Debug_with_optimisation]
[GENERAL_DATA_CONFIGURATION_Debug_with_optimisation]
[GENERAL_DATA_CONFIGURATION_SESSION_Blinky_DefaultSession]
[SESSION_DATA_CONFIGURATION_SESSION_Blinky_DefaultSession]
"MEMORY_MAPPING_OPTIONS" ""
[GENERAL_DATA_CONFIGURATION_SESSION_Blinky_SessionRX600_E1_E20_SYSTEM]
[SESSION_DATA_CONFIGURATION_SESSION_Blinky_SessionRX600_E1_E20_SYSTEM]
"MEMORY_MAPPING_OPTIONS" "Unknown Options"
[GENERAL_DATA_CONFIGURATION_SESSION_Debug_DefaultSession]
[SESSION_DATA_CONFIGURATION_SESSION_Debug_DefaultSession]
"MEMORY_MAPPING_OPTIONS" ""
[GENERAL_DATA_CONFIGURATION_SESSION_Debug_SessionRX600_E1_E20_SYSTEM]
[SESSION_DATA_CONFIGURATION_SESSION_Debug_SessionRX600_E1_E20_SYSTEM]
"MEMORY_MAPPING_OPTIONS" "Unknown Options"
[GENERAL_DATA_CONFIGURATION_SESSION_Debug_RX600_E1_E20_SYSTEM_DefaultSession]
[SESSION_DATA_CONFIGURATION_SESSION_Debug_RX600_E1_E20_SYSTEM_DefaultSession]
"MEMORY_MAPPING_OPTIONS" ""
[GENERAL_DATA_CONFIGURATION_SESSION_Debug_RX600_E1_E20_SYSTEM_SessionRX600_E1_E20_SYSTEM]
[SESSION_DATA_CONFIGURATION_SESSION_Debug_RX600_E1_E20_SYSTEM_SessionRX600_E1_E20_SYSTEM]
"MEMORY_MAPPING_OPTIONS" "Unknown Options"
[GENERAL_DATA_CONFIGURATION_SESSION_Debug_with_optimisation_DefaultSession]
[SESSION_DATA_CONFIGURATION_SESSION_Debug_with_optimisation_DefaultSession]
"MEMORY_MAPPING_OPTIONS" ""
[GENERAL_DATA_CONFIGURATION_SESSION_Debug_with_optimisation_SessionRX600_E1_E20_SYSTEM]
[SESSION_DATA_CONFIGURATION_SESSION_Debug_with_optimisation_SessionRX600_E1_E20_SYSTEM]
"MEMORY_MAPPING_OPTIONS" "Unknown Options"
[EXT_DEBUGGER_INFO]
0 "" "" "" ""
[END]

@ -0,0 +1,48 @@
[HIMDBVersion]
2.0
[DATABASE_VERSION]
"1.1"
[SESSIONS_]
"DefaultSession"
"SessionRX600_E1_E20_SYSTEM"
[CONFIGURATIONS]
"Blinky"
"Debug"
"Debug_RX600_E1_E20_SYSTEM"
"Debug_with_optimisation"
[CURRENT_CONFIGURATION]
"Debug"
[CURRENT_SESSION]
"SessionRX600_E1_E20_SYSTEM"
[GENERAL_DATA_PROJECT]
[GENERAL_DATA_CONFIGURATION_Blinky]
"PROJECT_FILES_MODIFIED_DATA_TAG" "FALSE"
[SESSIONS_Blinky]
"DefaultSession"
"SessionRX600_E1_E20_SYSTEM"
[GENERAL_DATA_CONFIGURATION_Debug]
"PROJECT_FILES_MODIFIED_DATA_TAG" "FALSE"
[SESSIONS_Debug]
"DefaultSession"
"SessionRX600_E1_E20_SYSTEM"
[GENERAL_DATA_CONFIGURATION_Debug_RX600_E1_E20_SYSTEM]
"PROJECT_FILES_MODIFIED_DATA_TAG" "TRUE"
[SESSIONS_Debug_RX600_E1_E20_SYSTEM]
"DefaultSession"
"SessionRX600_E1_E20_SYSTEM"
[GENERAL_DATA_CONFIGURATION_Debug_with_optimisation]
"PROJECT_FILES_MODIFIED_DATA_TAG" "TRUE"
[SESSIONS_Debug_with_optimisation]
"DefaultSession"
"SessionRX600_E1_E20_SYSTEM"
[GENERAL_DATA_SESSION_DefaultSession]
[GENERAL_DATA_CONFIGURATION_SESSION_Blinky_SessionRX600_E1_E20_SYSTEM]
[GENERAL_DATA_CONFIGURATION_SESSION_Blinky_DefaultSession]
[GENERAL_DATA_CONFIGURATION_SESSION_Debug_RX600_E1_E20_SYSTEM_SessionRX600_E1_E20_SYSTEM]
[GENERAL_DATA_CONFIGURATION_SESSION_Debug_DefaultSession]
[GENERAL_DATA_CONFIGURATION_SESSION_Debug_RX600_E1_E20_SYSTEM_DefaultSession]
[GENERAL_DATA_CONFIGURATION_SESSION_Debug_SessionRX600_E1_E20_SYSTEM]
[GENERAL_DATA_CONFIGURATION_SESSION_Debug_with_optimisation_DefaultSession]
[GENERAL_DATA_CONFIGURATION_SESSION_Debug_with_optimisation_SessionRX600_E1_E20_SYSTEM]
[GENERAL_DATA_SESSION_SessionRX600_E1_E20_SYSTEM]
[END]

@ -0,0 +1,230 @@
/******************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Technology Corp. and is only
* intended for use with Renesas products. No other uses are authorized.
* This software is owned by Renesas Technology Corp. and is protected under
* all applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES
* REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY,
* INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
* PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY
* DISCLAIMED.
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
* TECHNOLOGY CORP. NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES
* FOR ANY REASON RELATED TO THE THIS SOFTWARE, EVEN IF RENESAS OR ITS
* AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this
* software and to discontinue the availability of this software.
* By using this software, you agree to the additional terms and
* conditions found by accessing the following link:
* http://www.renesas.com/disclaimer
******************************************************************************
* Copyright (C) 2008. Renesas Technology Corp., All Rights Reserved.
*******************************************************************************
* File Name : hwsetup.c
* Version : 1.00
* Description : Power up hardware initializations
******************************************************************************
* History : DD.MM.YYYY Version Description
* : 15.02.2010 1.00 First Release
******************************************************************************/
/******************************************************************************
Includes <System Includes> , "Project Includes"
******************************************************************************/
#include <iorx62n.h>
#include "rskrx62ndef.h"
// #include "lcd.h" Uncomment this if an LCD is present.
#include "r_ether.h"
/******************************************************************************
Typedef definitions
******************************************************************************/
/******************************************************************************
Macro definitions
******************************************************************************/
/******************************************************************************
Imported global variables and functions (from other files)
******************************************************************************/
/******************************************************************************
Exported global variables and functions (to be accessed by other files)
******************************************************************************/
/******************************************************************************
Private global variables and functions
******************************************************************************/
void io_set_cpg(void);
void ConfigurePortPins(void);
void EnablePeripheralModules(void);
/******************************************************************************
* Function Name: HardwareSetup
* Description : This function does initial setting for CPG port pins used in
* : the Demo including the MII pins of the Ethernet PHY connection.
* Arguments : none
* Return Value : none
******************************************************************************/
void HardwareSetup(void)
{
/* CPG setting */
io_set_cpg();
/* Setup the port pins */
ConfigurePortPins();
/* Enables peripherals */
EnablePeripheralModules();
#if INCLUDE_LCD == 1
/* Initialize display */
InitialiseDisplay();
#endif
}
/******************************************************************************
* Function Name: EnablePeripheralModules
* Description : Enables Peripheral Modules before use
* Arguments : none
* Return Value : none
******************************************************************************/
void EnablePeripheralModules(void)
{
/* Module standby clear */
SYSTEM.MSTPCRB.BIT.MSTPB15 = 0; /* EtherC, EDMAC */
SYSTEM.MSTPCRA.BIT.MSTPA15 = 0; /* CMT0 */
}
/******************************************************************************
* Function Name: ConfigurePortPins
* Description : Configures port pins.
* Arguments : none
* Return Value : none
******************************************************************************/
void ConfigurePortPins(void)
{
/* Port pins default to inputs. To ensure safe initialisation set the pin states
before changing the data direction registers. This will avoid any unintentional
state changes on the external ports.
Many peripheral modules will override the setting of the port registers. Ensure
that the state is safe for external devices if the internal peripheral module is
disabled or powered down. */
/* ==== MII/RMII Pins setting ==== */
/*--------------------------------------*/
/* Port Function Control Register */
/*--------------------------------------*/
#if ETH_MODE_SEL == ETH_MII_MODE
/* EE=1, PHYMODE=1, ENETE3=1, ENETE2=0, ENETE1=1, ENETE0=0 (Ethernet) */
IOPORT.PFENET.BYTE = 0x9A;
#endif /* ETH_MODE_SEL */
#if ETH_MODE_SEL == ETH_RMII_MODE
/* EE=1, PHYMODE=0, ENETE3=0, ENETE2=0, ENETE1=1, ENETE0=0 (Ethernet) */
IOPORT.PFENET.BYTE = 0x82;
#endif /* ETH_MODE_SEL */
/*-------------------------------------------*/
/* Input Buffer Control Register (ICR) */
/*-------------------------------------------*/
#if ETH_MODE_SEL == ETH_MII_MODE
/* P54=1 Set ET_LINKSTA input */
PORT5.ICR.BIT.B4 = 1;
/* P71=1 Set ET_MDIO input */
PORT7.ICR.BIT.B1 = 1;
/* P74=1 Set ET_ERXD1 input */
PORT7.ICR.BIT.B4 = 1;
/* P75=1 Set ET_ERXD0 input */
PORT7.ICR.BIT.B5 = 1;
/* P76=1 Set ET_RX_CLK input */
PORT7.ICR.BIT.B6 = 1;
/* P77=1 Set ET_RX_ER input */
PORT7.ICR.BIT.B7 = 1;
/* P83=1 Set ET_CRS input */
PORT8.ICR.BIT.B3 = 1;
/* PC0=1 Set ET_ERXD3 input */
PORTC.ICR.BIT.B0 = 1;
/* PC1=1 Set ET_ERXD2 input */
PORTC.ICR.BIT.B1 = 1;
/* PC2=1 Set ET_RX_DV input */
PORTC.ICR.BIT.B2 = 1;
/* PC4=1 Set EX_TX_CLK input */
PORTC.ICR.BIT.B4 = 1;
/* PC7=1 Set ET_COL input */
PORTC.ICR.BIT.B7 = 1;
#endif /* ETH_MODE_SEL */
#if ETH_MODE_SEL == ETH_RMII_MODE
/* P54=1 Set ET_LINKSTA input */
PORT5.ICR.BIT.B4 = 1;
/* P71=1 Set ET_MDIO input */
PORT7.ICR.BIT.B1 = 1;
/* P74=1 Set RMII_RXD1 input */
PORT7.ICR.BIT.B4 = 1;
/* P75=1 Set RMII_RXD0 input */
PORT7.ICR.BIT.B5 = 1;
/* P76=1 Set REF50CLK input */
PORT7.ICR.BIT.B6 = 1;
/* P77=1 Set RMII_RX_ER input */
PORT7.ICR.BIT.B7 = 1;
/* P83=1 Set RMII_CRS_DV input */
PORT8.ICR.BIT.B3 = 1;
#endif /* ETH_MODE_SEL */
/* Configure LED 0-5 pin settings */
PORT0.DR.BIT.B2 = 1;
PORT0.DR.BIT.B3 = 1;
PORT0.DR.BIT.B5 = 1;
PORT3.DR.BIT.B4 = 1;
PORT6.DR.BIT.B0 = 1;
PORT7.DR.BIT.B3 = 1;
PORT0.DDR.BIT.B2 = 1;
PORT0.DDR.BIT.B3 = 1;
PORT0.DDR.BIT.B5 = 1;
PORT3.DDR.BIT.B4 = 1;
PORT6.DDR.BIT.B0 = 1;
PORT7.DDR.BIT.B3 = 1;
/* Configure SW 1-3 pin settings */
PORT0.DDR.BIT.B0 = 0;
PORT0.DDR.BIT.B1 = 0;
PORT0.DDR.BIT.B7 = 0;
PORT0.ICR.BIT.B0 = 1;
PORT0.ICR.BIT.B1 = 1;
PORT0.ICR.BIT.B7 = 1;
#if INCLUDE_LCD == 1
/* Set LCD pins as outputs */
/* LCD-RS */
PORT8.DDR.BIT.B4 = 1;
/* LCD-EN */
PORT8.DDR.BIT.B5 = 1;
/*LCD-data */
PORT9.DDR.BYTE = 0xF0;
#endif
}
/******************************************************************************
* Function Name: io_set_cpg
* Description : Sets up operating speed
* Arguments : none
* Return Value : none
******************************************************************************/
void io_set_cpg(void)
{
/* Set CPU PLL operating frequencies. Changes to the peripheral clock will require
changes to the debugger and flash kernel BRR settings. */
/* ==== CPG setting ==== */
SYSTEM.SCKCR.LONG = 0x00020100; /* Clockin = 12MHz */
/* I Clock = 96MHz, B Clock = 24MHz, */
/* P Clock = 48MHz */
}

@ -0,0 +1,267 @@
[HIMDBVersion]
2.0
[DATABASE_VERSION]
"2.3"
[SESSION_DETAILS]
""
[INFORMATION]
""
[GENERAL_DATA]
"FIRST_CONNECTION_TAG" "NO"
"RESET_CPU_AFTER_DOWNLOAD_TAG" "VARIANT_TRUE_STORE_TAG"
"{228DB593-0AB2-4EBE-A098-A2CABF094E46}RamMonitorCtrlViews" "0"
"{287A8023-99B5-49E1-A54E-4DDCA43D7959}MapCtrlECX_MAP_FIND_SYMBOL_LIST" ""
"{287A8023-99B5-49E1-A54E-4DDCA43D7959}MapCtrlViews" "0"
"{2BA6A3EE-6488-11D5-80D4-00C04F68EAD7}ECXLABEL_ADDDLG_ADDR" ""
"{2BA6A3EE-6488-11D5-80D4-00C04F68EAD7}LabelCtrlSymbolFileDir" ""
"{2BA6A3EE-6488-11D5-80D4-00C04F68EAD7}LabelCtrlSymbolFileName" ""
"{2BA6A3EE-6488-11D5-80D4-00C04F68EAD7}LabelCtrlViews" "0"
"{2BA6A3EF-6488-11D5-80D4-00C04F68EAD7}StatusCtrlViews" "0"
"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlBatchFileName" ""
"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlBreakpointFlag" "-1 "
"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlBreakpointStatus" "-1 "
"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlBrowseDirectory" ""
"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlLogFileName" ""
"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlSplitterPosition" "242"
"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlViews" "1"
"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlWindowProperties" "17"
"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineWndInstanceKey0" "{WK_00000001_CmdLine}"
"{313F4FC1-6566-11D5-8BBE-0004E2013C71}TclTkCtrlLogFileName" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_COMPARE_END_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_COMPARE_START_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_DISPLAY_DEST_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_DISPLAY_END_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_DISPLAY_START_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_FILL_END_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_FILL_START_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_MOVE_END_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_MOVE_START_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_SEARCH_END_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_SEARCH_START_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_SET_DEST_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_TEST_END_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_TEST_START_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}MemoryCtrlViews" "0"
"{4F025ABC-BE66-4CB6-9CEE-06C61418278E}Trace2CtrlSaveFileDir" ""
"{4F025ABC-BE66-4CB6-9CEE-06C61418278E}Trace2CtrlSaveFileName" ""
"{4F025ABC-BE66-4CB6-9CEE-06C61418278E}Trace2CtrlViews" "0"
"{5F75FDA0-6FF0-11D5-B7CE-00E029352378}PACtrlSaveFileDir" ""
"{5F75FDA0-6FF0-11D5-B7CE-00E029352378}PACtrlSaveFileName" ""
"{5F75FDA0-6FF0-11D5-B7CE-00E029352378}PACtrlViews" "0"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_EVAL_DENORMAL_MODE" "16777216"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_EVAL_ROUND_MODE" "768"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_0" "000000000000ABB0"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_1" "000000000000EB10"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_10" "00000000CA0A613B"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_11" "00000000451A522C"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_12" "00000000A5A5A5A5"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_13" "00000000A5A5A5A5"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_14" "00000000A5A5A5A5"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_15" "00000000A5A5A5A5"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_16" "000000000000ABB0"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_17" "0000000000017FA0"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_18" "0000000000030004"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_19" "00000000FFF8A062"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_2" "00000000A5A5A5A5"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_20" "00000000FFF8CE58"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_21" "0000000000000000"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_22" "0000000000000000"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_23" "0000000000000000"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_24" "0000000040000140"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_25" "00008A613AE30000"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_3" "00000000A5A5A5A5"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_4" "00000000A5A5A5A5"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_5" "00000000A5A5A5A5"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_6" "000000000000ABB0"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_7" "0000000000000000"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_8" "00000000A5A5A5A5"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_9" "00000000A5A5A5A5"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_COUNT" "26"
"{6C4D5B81-FD67-46A9-A089-EA44DCDE47FD}RAMMonitorManagerCtrlBlockInfoFileDir" ""
"{6C4D5B81-FD67-46A9-A089-EA44DCDE47FD}RAMMonitorManagerCtrlBlockInfoFileName" ""
"{7943C44E-7D44-422A-9140-4CF55C88F7D3}DifferenceCtrlViews" "0"
"{855C64C3-E49C-4450-9BCA-C9822566D214}OSObjectCtrlViews" "0"
"{8A898260-6F1D-11D5-8EB6-00004CC34E9D}ECX_WAVE" "00000000,00000000,0,0"
"{8A898260-6F1D-11D5-8EB6-00004CC34E9D}ECX_WAVE_ADDRESS_NAME" ""
"{8A898260-6F1D-11D5-8EB6-00004CC34E9D}ECX_WAVE_COMB_ADDRESS" ",,,,"
"{8A898260-6F1D-11D5-8EB6-00004CC34E9D}ECX_WAVE_COMB_BUFFER" ",,,,"
"{8A898260-6F1D-11D5-8EB6-00004CC34E9D}ECX_WAVE_SAMPLING_RATE" "1000"
"{8A898260-6F1D-11D5-8EB6-00004CC34E9D}WaveformCtrlViews" "0"
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersCtrlViews" "0"
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWnd0ColumnWidth" "47,153,48"
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWnd0ECX_REGISTER_COUNT" "33"
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWnd0ECX_REGISTER_DISPLAYED" "1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1"
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWnd0HideFLAGs" "0"
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWnd0HideRadix" "0"
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWnd0LastFileName" ""
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWnd0RadixList" "16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,2,16,16,16,16,16,16,16,"
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWndInstanceKey0" "{WK_00000001_REGISTERS}RTOSDemoSessionRX600_E1_E20_SYSTEM"
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWndViewB0ColumnWidth" "47,153,35"
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWndViewB0ECX_REGISTER_COUNT" "33"
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWndViewB0ECX_REGISTER_DISPLAYED" "1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1"
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWndViewB0HideFLAGs" "0"
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWndViewB0HideRadix" "0"
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWndViewB0LastFileName" ""
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWndViewB0RadixList" "16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,2,16,16,16,16,16,16,16,"
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWndViewBInstanceKey0" "{WK_00000001_REGISTERS}RTOSDemoSessionRX600_E1_E20_SYSTEMViewB"
"{AC411480-6F0A-11D5-8EB6-00004CC34E9D}ECX_IMAGE_ADDRESS_NAME" ""
"{AC411480-6F0A-11D5-8EB6-00004CC34E9D}ECX_IMAGE_BUFFER" "00000000,00000000,0,0"
"{AC411480-6F0A-11D5-8EB6-00004CC34E9D}ECX_IMAGE_COLOR" "0,0,0,0"
"{AC411480-6F0A-11D5-8EB6-00004CC34E9D}ECX_IMAGE_COMB_ADDRESS" ",,,,"
"{AC411480-6F0A-11D5-8EB6-00004CC34E9D}ECX_IMAGE_COMB_PALETTE" ",,,,"
"{AC411480-6F0A-11D5-8EB6-00004CC34E9D}ECX_IMAGE_PALETTE_NAME" ""
"{AC411480-6F0A-11D5-8EB6-00004CC34E9D}ECX_IMAGE_REDRAW_CONTINUOUSLY" "0,2"
"{AC411480-6F0A-11D5-8EB6-00004CC34E9D}ECX_IMAGE_SAMPLEING_RATE" "1000"
"{AC411480-6F0A-11D5-8EB6-00004CC34E9D}ECX_IMAGE_VIEW" "0,0,0,0,0,0"
"{AC411480-6F0A-11D5-8EB6-00004CC34E9D}ImageCtrlViews" "0"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchCtrlViews" "4"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ColWidth0" "247"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ColWidth1" "150"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ColWidth12" "200"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ColWidth2" "120"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ColWidth3" "200"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd0ECX_WATCH_ITEMCnt" "0"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd1ColWidth0" "120"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd1ColWidth1" "150"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd1ColWidth12" "200"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd1ColWidth2" "120"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd1ColWidth3" "200"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd1ECX_WATCH_ITEMCnt" "0"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd2ColWidth0" "120"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd2ColWidth1" "150"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd2ColWidth12" "200"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd2ColWidth2" "120"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd2ColWidth3" "200"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd2ECX_WATCH_ITEMCnt" "0"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd3ColWidth0" "120"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd3ColWidth1" "150"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd3ColWidth12" "200"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd3ColWidth2" "120"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd3ColWidth3" "200"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWnd3ECX_WATCH_ITEMCnt" "0"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWndInitial_Radix" "0"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWndInstanceKey0" "{WK_00000001_WATCH}RTOSDemoSessionRX600_E1_E20_SYSTEM"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWndRecentFile_WatchRecord" ""
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWndRecentFile_WatchSave" ""
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWndUpdate_Interval" "100"
"{B39CE26B-928D-4241-BF8F-E15980C81200}DebugConsoleCtrlDCEnable" "1"
"{B39CE26B-928D-4241-BF8F-E15980C81200}DebugConsoleCtrlLocalEchoEnable" "1"
"{B39CE26B-928D-4241-BF8F-E15980C81200}DebugConsoleCtrlLogFileName" ""
"{B39CE26B-928D-4241-BF8F-E15980C81200}DebugConsoleCtrlPortBaudIndex" "0"
"{B39CE26B-928D-4241-BF8F-E15980C81200}DebugConsoleCtrlPortName" ""
"{B39CE26B-928D-4241-BF8F-E15980C81200}DebugConsoleCtrlSendDataTimeout" "50"
"{B39CE26B-928D-4241-BF8F-E15980C81200}DebugConsoleCtrlViews" "1"
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"{F866DB60-6186-11D5-8BBE-0004E2013C71}IOCtrlSaveFileDir" "$(CONFIGDIR)"
"{F866DB60-6186-11D5-8BBE-0004E2013C71}IOCtrlSaveFileName" ""
"{F866DB60-6186-11D5-8BBE-0004E2013C71}IOCtrlViews" "0"
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@ -0,0 +1,62 @@
/*
FreeRTOS V6.0.5 - Copyright (C) 2010 Real Time Engineers Ltd.
***************************************************************************
* *
* If you are: *
* *
* + New to FreeRTOS, *
* + Wanting to learn FreeRTOS or multitasking in general quickly *
* + Looking for basic training, *
* + Wanting to improve your FreeRTOS skills and productivity *
* *
* then take a look at the FreeRTOS eBook *
* *
* "Using the FreeRTOS Real Time Kernel - a Practical Guide" *
* http://www.FreeRTOS.org/Documentation *
* *
* A pdf reference manual is also available. Both are usually delivered *
* to your inbox within 20 minutes to two hours when purchased between 8am *
* and 8pm GMT (although please allow up to 24 hours in case of *
* exceptional circumstances). Thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
***NOTE*** The exception to the GPL is included to allow you to distribute
a combined work that includes FreeRTOS without being obliged to provide the
source code for proprietary components outside of the FreeRTOS kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
1 tab == 4 spaces!
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
#ifndef INT_QUEUE_TIMER_H
#define INT_QUEUE_TIMER_H
void vInitialiseTimerForIntQueueTest( void );
portBASE_TYPE xTimer0Handler( void );
portBASE_TYPE xTimer1Handler( void );
#endif

@ -0,0 +1,714 @@
/***********************************************************************/
/* */
/* FILE :inthandler.h */
/* DATE :Wed, Aug 25, 2010 */
/* DESCRIPTION :Interrupt Handler Declarations */
/* CPU TYPE :Other */
/* */
/* This file is generated by KPIT GNU Project Generator. */
/* */
/***********************************************************************/
#ifndef INTHANDLER_H
#define INTHANDLER_H
// Exception(Supervisor Instruction)
void INT_Excep_SuperVisorInst(void) __attribute__ ((interrupt));
// Exception(Undefined Instruction)
void INT_Excep_UndefinedInst(void) __attribute__ ((interrupt));
// Exception(Floating Point)
void INT_Excep_FloatingPoint(void) __attribute__ ((interrupt));
// NMI
void INT_NonMaskableInterrupt(void) __attribute__ ((interrupt));
// Dummy
void Dummy (void) __attribute__ ((interrupt));
// BRK
void INT_Excep_BRK(void) __attribute__ ((interrupt));
// vector 1 reserved
// vector 2 reserved
// vector 3 reserved
// vector 4 reserved
// vector 5 reserved
// vector 6 reserved
// vector 7 reserved
// vector 8 reserved
// vector 9 reserved
// vector 10 reserved
// vector 11 reserved
// vector 12 reserved
// vector 13 reserved
// vector 14 reserved
// vector 15 reserved
// BUSERR
void INT_Excep_BUSERR(void) __attribute__ ((interrupt));
// vector 17 reserved
// vector 18 reserved
// vector 19 reserved
// vector 20 reserved
// FCU_FCUERR
void INT_Excep_FCU_FCUERR(void) __attribute__ ((interrupt));
// vector 22 reserved
// FCU_FRDYI
void INT_Excep_FCU_FRDYI(void) __attribute__ ((interrupt));
// vector 24 reserved
// vector 25 reserved
// vector 26 reserved
// vector 27 reserved
// CMTU0_CMT0
void INT_Excep_CMTU0_CMT0(void) __attribute__ ((interrupt));
// CMTU0_CMT1
void INT_Excep_CMTU0_CMT1(void) __attribute__ ((interrupt));
// CMTU1_CMT2
void INT_Excep_CMTU1_CMT2(void) __attribute__ ((interrupt));
// CMTU1_CMT3
void INT_Excep_CMTU1_CMT3(void) __attribute__ ((interrupt));
// vector 32 reserved
// vector 33 reserved
// vector 34 reserved
// vector 35 reserved
// vector 36 reserved
// vector 37 reserved
// vector 38 reserved
// vector 39 reserved
// vector 40 reserved
// vector 41 reserved
// vector 42 reserved
// vector 43 reserved
// vector 44 reserved
// vector 45 reserved
// vector 46 reserved
// vector 47 reserved
// vector 48 reserved
// vector 49 reserved
// vector 50 reserved
// vector 51 reserved
// vector 52 reserved
// vector 53 reserved
// vector 54 reserved
// vector 55 reserved
// vector 56 reserved
// vector 57 reserved
// vector 58 reserved
// vector 59 reserved
// vector 60 reserved
// vector 61 reserved
// vector 62 reserved
// vector 63 reserved
// IRQ0
void INT_Excep_IRQ0(void) __attribute__ ((interrupt));
// IRQ1
void INT_Excep_IRQ1(void) __attribute__ ((interrupt));
// IRQ2
void INT_Excep_IRQ2(void) __attribute__ ((interrupt));
// IRQ3
void INT_Excep_IRQ3(void) __attribute__ ((interrupt));
// IRQ4
void INT_Excep_IRQ4(void) __attribute__ ((interrupt));
// IRQ5
void INT_Excep_IRQ5(void) __attribute__ ((interrupt));
// IRQ6
void INT_Excep_IRQ6(void) __attribute__ ((interrupt));
// IRQ7
void INT_Excep_IRQ7(void) __attribute__ ((interrupt));
// IRQ8
void INT_Excep_IRQ8(void) __attribute__ ((interrupt));
// IRQ9
void INT_Excep_IRQ9(void) __attribute__ ((interrupt));
// IRQ10
void INT_Excep_IRQ10(void) __attribute__ ((interrupt));
// IRQ11
void INT_Excep_IRQ11(void) __attribute__ ((interrupt));
// IRQ12
void INT_Excep_IRQ12(void) __attribute__ ((interrupt));
// IRQ13
void INT_Excep_IRQ13(void) __attribute__ ((interrupt));
// IRQ14
void INT_Excep_IRQ14(void) __attribute__ ((interrupt));
// IRQ15
void INT_Excep_IRQ15(void) __attribute__ ((interrupt));
// vector 80 reserved
// vector 81 reserved
// vector 82 reserved
// vector 83 reserved
// vector 84 reserved
// vector 85 reserved
// vector 86 reserved
// vector 87 reserved
// vector 88 reserved
// vector 89 reserved
// vector 90 reserved
// vector 91 reserved
// vector 92 reserved
// vector 93 reserved
// vector 94 reserved
// vector 95 reserved
// WDT_WOVI
void INT_Excep_WDT_WOVI(void) __attribute__ ((interrupt));
// vector 97 reserved
// AD0_ADI0
void INT_Excep_AD0_ADI0(void) __attribute__ ((interrupt));
// AD1_ADI1
void INT_Excep_AD1_ADI1(void) __attribute__ ((interrupt));
// AD2_ADI2
void INT_Excep_AD2_ADI2(void) __attribute__ ((interrupt));
// AD3_ADI3
void INT_Excep_AD3_ADI3(void) __attribute__ ((interrupt));
// vector 102 reserved
// vector 103 reserved
// TPU0_TGI0A
void INT_Excep_TPU0_TGI0A(void) __attribute__ ((interrupt));
// TPU0_TGI0B
void INT_Excep_TPU0_TGI0B(void) __attribute__ ((interrupt));
// TPU0_TGI0C
void INT_Excep_TPU0_TGI0C(void) __attribute__ ((interrupt));
// TPU0_TGI0D
void INT_Excep_TPU0_TGI0D(void) __attribute__ ((interrupt));
// TPU0_TCI0V
void INT_Excep_TPU0_TCI0V(void) __attribute__ ((interrupt));
// vector 109 reserved
// vector 110 reserved
// TPU1_TGI1A
void INT_Excep_TPU1_TGI1A(void) __attribute__ ((interrupt));
// TPU1_TGI1B
void INT_Excep_TPU1_TGI1B(void) __attribute__ ((interrupt));
// vector 113 reserved
// vector 114 reserved
// TPU1_TCI1V
void INT_Excep_TPU1_TCI1V(void) __attribute__ ((interrupt));
// TPU1_TCI1U
void INT_Excep_TPU1_TCI1U(void) __attribute__ ((interrupt));
// TPU2_TGI2A
void INT_Excep_TPU2_TGI2A(void) __attribute__ ((interrupt));
// TPU2_TGI2B
void INT_Excep_TPU2_TGI2B(void) __attribute__ ((interrupt));
// vector 119 reserved
// TPU2_TCI2V
void INT_Excep_TPU2_TCI2V(void) __attribute__ ((interrupt));
// TPU2_TCI2U
void INT_Excep_TPU2_TCI2U(void) __attribute__ ((interrupt));
// TPU3_TGI3A
void INT_Excep_TPU3_TGI3A(void) __attribute__ ((interrupt));
// TPU3_TGI3B
void INT_Excep_TPU3_TGI3B(void) __attribute__ ((interrupt));
// TPU3_TGI3C
void INT_Excep_TPU3_TGI3C(void) __attribute__ ((interrupt));
// TPU3_TGI3D
void INT_Excep_TPU3_TGI3D(void) __attribute__ ((interrupt));
// TPU3_TCI3V
void INT_Excep_TPU3_TCI3V(void) __attribute__ ((interrupt));
// TPU4_TGI4A
void INT_Excep_TPU4_TGI4A(void) __attribute__ ((interrupt));
// TPU4_TGI4B
void INT_Excep_TPU4_TGI4B(void) __attribute__ ((interrupt));
// vector 129 reserved
// vector 130 reserved
// TPU4_TCI4V
void INT_Excep_TPU4_TCI4V(void) __attribute__ ((interrupt));
// TPU4_TCI4U
void INT_Excep_TPU4_TCI4U(void) __attribute__ ((interrupt));
// TPU5_TGI5A
void INT_Excep_TPU5_TGI5A(void) __attribute__ ((interrupt));
// TPU5_TGI5B
void INT_Excep_TPU5_TGI5B(void) __attribute__ ((interrupt));
// vector 135 reserved
// TPU5_TCI5V
void INT_Excep_TPU5_TCI5V(void) __attribute__ ((interrupt));
// TPU5_TCI5U
void INT_Excep_TPU5_TCI5U(void) __attribute__ ((interrupt));
// TPU6_TGI6A
void INT_Excep_TPU6_TGI6A(void) __attribute__ ((interrupt));
// TPU6_TGI6B
void INT_Excep_TPU6_TGI6B(void) __attribute__ ((interrupt));
// TPU6_TGI6C
void INT_Excep_TPU6_TGI6C(void) __attribute__ ((interrupt));
// TPU6_TGI6D
void INT_Excep_TPU6_TGI6D(void) __attribute__ ((interrupt));
// TPU6_TCI6V
void INT_Excep_TPU6_TCI6V(void) __attribute__ ((interrupt));
// vector 143 reserved
// vector 144 reserved
// TPU7_TGI7A
void INT_Excep_TPU7_TGI7A(void) __attribute__ ((interrupt));
// TPU7_TGI7B
void INT_Excep_TPU7_TGI7B(void) __attribute__ ((interrupt));
// vector 147 reserved
// vector 148 reserved
// TPU7_TCI7V
void INT_Excep_TPU7_TCI7V(void) __attribute__ ((interrupt));
// TPU7_TCI7U
void INT_Excep_TPU7_TCI7U(void) __attribute__ ((interrupt));
// TPU8_TGI8A
void INT_Excep_TPU8_TGI8A(void) __attribute__ ((interrupt));
// TPU8_TGI8B
void INT_Excep_TPU8_TGI8B(void) __attribute__ ((interrupt));
// vector 153 reserved
// TPU8_TCI8V
void INT_Excep_TPU8_TCI8V(void) __attribute__ ((interrupt));
// TPU8_TCI8U
void INT_Excep_TPU8_TCI8U(void) __attribute__ ((interrupt));
// TPU9_TGI9A
void INT_Excep_TPU9_TGI9A(void) __attribute__ ((interrupt));
// TPU9_TGI9B
void INT_Excep_TPU9_TGI9B(void) __attribute__ ((interrupt));
// TPU9_TGI9C
void INT_Excep_TPU9_TGI9C(void) __attribute__ ((interrupt));
// TPU9_TGI9D
void INT_Excep_TPU9_TGI9D(void) __attribute__ ((interrupt));
// TPU9_TCI9V
void INT_Excep_TPU9_TCI9V(void) __attribute__ ((interrupt));
// TPU10_TGI10A
void INT_Excep_TPU10_TGI10A(void) __attribute__ ((interrupt));
// TPU10_TGI10B
void INT_Excep_TPU10_TGI10B(void) __attribute__ ((interrupt));
// vector 163 reserved
// vector 164 reserved
// TPU10_TCI10V
void INT_Excep_TPU10_TCI10V(void) __attribute__ ((interrupt));
// TPU10_TCI10U
void INT_Excep_TPU10_TCI10U(void) __attribute__ ((interrupt));
// TPU11_TGI11A
void INT_Excep_TPU11_TGI11A(void) __attribute__ ((interrupt));
// TPU11_TGI11B
void INT_Excep_TPU11_TGI11B(void) __attribute__ ((interrupt));
// vector 169 reserved
// TPU11_TCI11V
void INT_Excep_TPU11_TCI11V(void) __attribute__ ((interrupt));
// TPU11_TCI11U
void INT_Excep_TPU11_TCI11U(void) __attribute__ ((interrupt));
// vector 172 reserved
// vector 173 reserved
// TMR0_CMI0A
void INT_Excep_TMR0_CMI0A(void) __attribute__ ((interrupt));
// TMR0_CMI0B
void INT_Excep_TMR0_CMI0B(void) __attribute__ ((interrupt));
// TMR0_OV0I
void INT_Excep_TMR0_OV0I(void) __attribute__ ((interrupt));
// TMR1_CMI1A
void INT_Excep_TMR1_CMI1A(void) __attribute__ ((interrupt));
// TMR1_CMI1B
void INT_Excep_TMR1_CMI1B(void) __attribute__ ((interrupt));
// TMR1_OV1I
void INT_Excep_TMR1_OV1I(void) __attribute__ ((interrupt));
// TMR2_CMI2A
void INT_Excep_TMR2_CMI2A(void) __attribute__ ((interrupt));
// TMR2_CMI2B
void INT_Excep_TMR2_CMI2B(void) __attribute__ ((interrupt));
// TMR2_OV2I
void INT_Excep_TMR2_OV2I(void) __attribute__ ((interrupt));
// TMR3_CMI3A
void INT_Excep_TMR3_CMI3A(void) __attribute__ ((interrupt));
// TMR3_CMI3B
void INT_Excep_TMR3_CMI3B(void) __attribute__ ((interrupt));
// TMR3_OV3I
void INT_Excep_TMR3_OV3I(void) __attribute__ ((interrupt));
// vector 186 reserved
// vector 187 reserved
// vector 188 reserved
// vector 189 reserved
// vector 190 reserved
// vector 191 reserved
// vector 192 reserved
// vector 193 reserved
// vector 194 reserved
// vector 195 reserved
// vector 196 reserved
// vector 197 reserved
// DMAC_DMTEND0
void INT_Excep_DMAC_DMTEND0(void);
// DMAC_DMTEND1
void INT_Excep_DMAC_DMTEND1(void) __attribute__ ((interrupt));
// DMAC_DMTEND2
void INT_Excep_DMAC_DMTEND2(void) __attribute__ ((interrupt));
// DMAC_DMTEND3
void INT_Excep_DMAC_DMTEND3(void) __attribute__ ((interrupt));
// vector 202 reserved
// vector 203 reserved
// vector 204 reserved
// vector 205 reserved
// vector 206 reserved
// vector 207 reserved
// vector 208 reserved
// vector 209 reserved
// vector 210 reserved
// vector 211 reserved
// vector 212 reserved
// vector 213 reserved
// SCI0_ERI0
void INT_Excep_SCI0_ERI0(void) __attribute__ ((interrupt));
// SCI0_RXI0
void INT_Excep_SCI0_RXI0(void) __attribute__ ((interrupt));
// SCI0_TXI0
void INT_Excep_SCI0_TXI0(void) __attribute__ ((interrupt));
// SCI0_TEI0
void INT_Excep_SCI0_TEI0(void) __attribute__ ((interrupt));
// SCI1_ERI1
void INT_Excep_SCI1_ERI1(void) __attribute__ ((interrupt));
// SCI1_RXI1
void INT_Excep_SCI1_RXI1(void) __attribute__ ((interrupt));
// SCI1_TXI1
void INT_Excep_SCI1_TXI1(void) __attribute__ ((interrupt));
// SCI1_TEI1
void INT_Excep_SCI1_TEI1(void) __attribute__ ((interrupt));
// SCI2_ERI2
void INT_Excep_SCI2_ERI2(void) __attribute__ ((interrupt));
// SCI2_RXI2
void INT_Excep_SCI2_RXI2(void) __attribute__ ((interrupt));
// SCI2_TXI2
void INT_Excep_SCI2_TXI2(void) __attribute__ ((interrupt));
// SCI2_TEI2
void INT_Excep_SCI2_TEI2(void) __attribute__ ((interrupt));
// SCI3_ERI3
void INT_Excep_SCI3_ERI3(void) __attribute__ ((interrupt));
// SCI3_RXI3
void INT_Excep_SCI3_RXI3(void) __attribute__ ((interrupt));
// SCI3_TXI3
void INT_Excep_SCI3_TXI3(void) __attribute__ ((interrupt));
// SCI3_TEI3
void INT_Excep_SCI3_TEI3(void) __attribute__ ((interrupt));
// SCI4_ERI4
void INT_Excep_SCI4_ERI4(void) __attribute__ ((interrupt));
// SCI4_RXI4
void INT_Excep_SCI4_RXI4(void) __attribute__ ((interrupt));
// SCI4_TXI4
void INT_Excep_SCI4_TXI4(void) __attribute__ ((interrupt));
// SCI4_TEI4
void INT_Excep_SCI4_TEI4(void) __attribute__ ((interrupt));
// SCI5_ERI5
void INT_Excep_SCI5_ERI5(void) __attribute__ ((interrupt));
// SCI5_RXI5
void INT_Excep_SCI5_RXI5(void) __attribute__ ((interrupt));
// SCI5_TXI5
void INT_Excep_SCI5_TXI5(void) __attribute__ ((interrupt));
// SCI5_TEI5
void INT_Excep_SCI5_TEI5(void) __attribute__ ((interrupt));
// SCI6_ERI6
void INT_Excep_SCI6_ERI6(void) __attribute__ ((interrupt));
// SCI6_RXI6
void INT_Excep_SCI6_RXI6(void) __attribute__ ((interrupt));
// SCI6_TXI6
void INT_Excep_SCI6_TXI6(void) __attribute__ ((interrupt));
// SCI6_TEI6
void INT_Excep_SCI6_TEI6(void) __attribute__ ((interrupt));
// vector 242 reserved
// vector 243 reserved
// vector 244 reserved
// vector 245 reserved
// RIIC0_EEI0
void INT_Excep_RIIC0_EEI0(void) __attribute__ ((interrupt));
// RIIC0_RXI0
void INT_Excep_RIIC0_RXI0(void) __attribute__ ((interrupt));
// RIIC0_TXI0
void INT_Excep_RIIC0_TXI0(void) __attribute__ ((interrupt));
// RIIC0_TEI0
void INT_Excep_RIIC0_TEI0(void) __attribute__ ((interrupt));
// RIIC1_EEI1
void INT_Excep_RIIC1_EEI1(void) __attribute__ ((interrupt));
// RIIC1_RXI1
void INT_Excep_RIIC1_RXI1(void) __attribute__ ((interrupt));
// RIIC1_TXI1
void INT_Excep_RIIC1_TXI1(void) __attribute__ ((interrupt));
// RIIC1_TEI1
void INT_Excep_RIIC1_TEI1(void) __attribute__ ((interrupt));
// vector 254 reserved
// vector 255 reserved
//;<<VECTOR DATA START (POWER ON RESET)>>
//;Power On Reset PC
extern void PowerON_Reset_PC(void) __attribute__ ((interrupt));
//;<<VECTOR DATA END (POWER ON RESET)>>
#endif

File diff suppressed because it is too large Load Diff

@ -0,0 +1,23 @@
/***********************************************************************/
/* */
/* FILE :typedefine.h */
/* DATE :Wed, Aug 25, 2010 */
/* DESCRIPTION :Aliases of Integer Type */
/* CPU TYPE :Other */
/* */
/* This file is generated by KPIT GNU Project Generator. */
/* */
/***********************************************************************/
typedef signed char _SBYTE;
typedef unsigned char _UBYTE;
typedef signed short _SWORD;
typedef unsigned short _UWORD;
typedef signed int _SINT;
typedef unsigned int _UINT;
typedef signed long _SDWORD;
typedef unsigned long _UDWORD;
typedef signed long long _SQWORD;
typedef unsigned long long _UQWORD;

@ -0,0 +1,104 @@
/******************************************************************************
* DISCLAIMER
* Please refer to http://www.renesas.com/disclaimer
******************************************************************************
Copyright (C) 2008. Renesas Technology Corp., All Rights Reserved.
*******************************************************************************
* File Name : rsksh7216.h
* Version : 1.00
* Description : RSK 7216 board specific settings
******************************************************************************
* History : DD.MM.YYYY Version Description
* : 06.10.2009 1.00 First Release
******************************************************************************/
#ifndef RDKRX62N_H
#define RDKRX62N_H
/******************************************************************************
Includes <System Includes> , "Project Includes"
******************************************************************************/
/******************************************************************************
Typedef definitions
******************************************************************************/
/******************************************************************************
Macro definitions
******************************************************************************/
/* System Clock Settings */
#define XTAL_FREQUENCY (12000000L)
#define ICLK_MUL (8)
#define PCLK_MUL (4)
#define BCLK_MUL (4)
#define ICLK_FREQUENCY (XTAL_FREQUENCY * ICLK_MUL)
#define PCLK_FREQUENCY (XTAL_FREQUENCY * PCLK_MUL)
#define BCLK_FREQUENCY (XTAL_FREQUENCY * BCLK_MUL)
#define CMT0_CLK_SELECT (512)
/* General Values */
#define LED_ON (1)
#define LED_OFF (0)
#define SET_BIT_HIGH (1)
#define SET_BIT_LOW (0)
#define SET_BYTE_HIGH (0xFF)
#define SET_BYTE_LOW (0x00)
/* Define switches to be polled if not available as interrupts */
#define SW_ACTIVE FALSE
#define SW1 PORT4.PORT.BIT.B0
#define SW2 PORT4.PORT.BIT.B1
#define SW3 PORT4.PORT.BIT.B2
#define SW1_DDR PORT4.DDR.BIT.B0
#define SW2_DDR PORT4.DDR.BIT.B1
#define SW3_DDR PORT4.DDR.BIT.B2
#define SW1_ICR PORT4.ICR.BIT.B0
#define SW2_ICR PORT4.ICR.BIT.B1
#define SW3_ICR PORT4.ICR.BIT.B2
/* LEDs */
#define LED4 PORTD.DR.BIT.B5
#define LED5 PORTE.DR.BIT.B3
#define LED6 PORTD.DR.BIT.B2
#define LED7 PORTE.DR.BIT.B0
#define LED8 PORTD.DR.BIT.B4
#define LED9 PORTE.DR.BIT.B2
#define LED10 PORTD.DR.BIT.B1
#define LED11 PORTD.DR.BIT.B7
#define LED12 PORTD.DR.BIT.B3
#define LED13 PORTE.DR.BIT.B1
#define LED14 PORTD.DR.BIT.B0
#define LED15 PORTD.DR.BIT.B6
#define LED4_DDR PORTD.DDR.BIT.B5
#define LED5_DDR PORTE.DDR.BIT.B3
#define LED6_DDR PORTD.DDR.BIT.B2
#define LED7_DDR PORTE.DDR.BIT.B0
#define LED8_DDR PORTD.DDR.BIT.B4
#define LED9_DDR PORTE.DDR.BIT.B2
#define LED10_DDR PORTD.DDR.BIT.B1
#define LED11_DDR PORTD.DDR.BIT.B7
#define LED12_DDR PORTD.DDR.BIT.B3
#define LED13_DDR PORTE.DDR.BIT.B1
#define LED14_DDR PORTD.DDR.BIT.B0
#define LED15_DDR PORTD.DDR.BIT.B6
/******************************************************************************
Variable Externs
******************************************************************************/
/******************************************************************************
Functions Prototypes
******************************************************************************/
/* RDKRX62N_H */
#endif

@ -0,0 +1,227 @@
/*
FreeRTOS V6.0.5 - Copyright (C) 2010 Real Time Engineers Ltd.
***************************************************************************
* *
* If you are: *
* *
* + New to FreeRTOS, *
* + Wanting to learn FreeRTOS or multitasking in general quickly *
* + Looking for basic training, *
* + Wanting to improve your FreeRTOS skills and productivity *
* *
* then take a look at the FreeRTOS eBook *
* *
* "Using the FreeRTOS Real Time Kernel - a Practical Guide" *
* http://www.FreeRTOS.org/Documentation *
* *
* A pdf reference manual is also available. Both are usually delivered *
* to your inbox within 20 minutes to two hours when purchased between 8am *
* and 8pm GMT (although please allow up to 24 hours in case of *
* exceptional circumstances). Thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
***NOTE*** The exception to the GPL is included to allow you to distribute
a combined work that includes FreeRTOS without being obliged to provide the
source code for proprietary components outside of the FreeRTOS kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
1 tab == 4 spaces!
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
/*
* This is a very simple demo that creates two tasks and one queue. One task
* (the queue receive task) blocks on the queue to wait for data to arrive,
* toggling an LED each time '100' is received. The other task (the queue send
* task) repeatedly blocks for a fixed period before sending '100' to the queue
* (causing the first task to toggle the LED).
*
* For a much more complete and complex example select either the Debug or
* Debug_with_optimisation build configurations within the HEW IDE.
*/
/* Hardware specific includes. */
#include "iodefine.h"
/* Kernel includes. */
#include "FreeRTOS.h"
#include "task.h"
#include "queue.h"
/* Priorities at which the tasks are created. */
#define configQUEUE_RECEIVE_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 )
#define configQUEUE_SEND_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 )
/* The rate at which data is sent to the queue, specified in milliseconds. */
#define mainQUEUE_SEND_FREQUENCY_MS ( 500 / portTICK_RATE_MS )
/* The number of items the queue can hold. This is 1 as the receive task
will remove items as they are added so the send task should always find the
queue empty. */
#define mainQUEUE_LENGTH ( 1 )
/*
* The tasks as defined at the top of this file.
*/
static void prvQueueReceiveTask( void *pvParameters );
static void prvQueueSendTask( void *pvParameters );
/* The queue used by both tasks. */
static xQueueHandle xQueue = NULL;
/*-----------------------------------------------------------*/
void main(void)
{
extern void HardwareSetup( void );
/* Renesas provided CPU configuration routine. The clocks are configured in
here. */
HardwareSetup();
/* Turn all LEDs off. */
vParTestInitialise();
/* Create the queue. */
xQueue = xQueueCreate( mainQUEUE_LENGTH, sizeof( unsigned long ) );
if( xQueue != NULL )
{
/* Start the two tasks as described at the top of this file. */
xTaskCreate( prvQueueReceiveTask, "Rx", configMINIMAL_STACK_SIZE, NULL, configQUEUE_RECEIVE_TASK_PRIORITY, NULL );
xTaskCreate( prvQueueSendTask, "TX", configMINIMAL_STACK_SIZE, NULL, configQUEUE_SEND_TASK_PRIORITY, NULL );
/* Start the tasks running. */
vTaskStartScheduler();
}
/* If all is well we will never reach here as the scheduler will now be
running. If we do reach here then it is likely that there was insufficient
heap available for the idle task to be created. */
for( ;; );
}
/*-----------------------------------------------------------*/
static void prvQueueSendTask( void *pvParameters )
{
portTickType xNextWakeTime;
const unsigned long ulValueToSend = 100UL;
/* Initialise xNextWakeTime - this only needs to be done once. */
xNextWakeTime = xTaskGetTickCount();
for( ;; )
{
/* Place this task in the blocked state until it is time to run again.
The block state is specified in ticks, the constant used converts ticks
to ms. */
vTaskDelayUntil( &xNextWakeTime, mainQUEUE_SEND_FREQUENCY_MS );
/* Send to the queue - causing the queue receive task to flash its LED. 0
is used so the send does not block - it shouldn't need to as the queue
should always be empty here. */
xQueueSend( xQueue, &ulValueToSend, 0 );
}
}
/*-----------------------------------------------------------*/
static void prvQueueReceiveTask( void *pvParameters )
{
unsigned long ulReceivedValue;
for( ;; )
{
/* Wait until something arives in the queue - this will block
indefinitely provided INCLUDE_vTaskSuspend is set to 1 in
FreeRTOSConfig.h. */
xQueueReceive( xQueue, &ulReceivedValue, portMAX_DELAY );
/* To get here something must have arrived, but is it the expected
value? If it is, toggle the LED. */
if( ulReceivedValue == 100UL )
{
vParTestToggleLED( 0 );
}
}
}
/*-----------------------------------------------------------*/
void vApplicationSetupTimerInterrupt( void )
{
/* Enable compare match timer 0. */
MSTP( CMT0 ) = 0;
/* Interrupt on compare match. */
CMT0.CMCR.BIT.CMIE = 1;
/* Set the compare match value. */
CMT0.CMCOR = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / configTICK_RATE_HZ ) -1 ) / 8 );
/* Divide the PCLK by 8. */
CMT0.CMCR.BIT.CKS = 0;
/* Enable the interrupt... */
_IEN( _CMT0_CMI0 ) = 1;
/* ...and set its priority to the application defined kernel priority. */
_IPR( _CMT0_CMI0 ) = configKERNEL_INTERRUPT_PRIORITY;
/* Start the timer. */
CMT.CMSTR0.BIT.STR0 = 1;
}
/*-----------------------------------------------------------*/
/* This function is explained by the comments above its prototype at the top
of this file. */
void vApplicationMallocFailedHook( void )
{
for( ;; );
}
/*-----------------------------------------------------------*/
/* This function is explained by the comments above its prototype at the top
of this file. */
void vApplicationStackOverflowHook( xTaskHandle *pxTask, signed char *pcTaskName )
{
for( ;; );
}
/*-----------------------------------------------------------*/
/* This function is explained by the comments above its prototype at the top
of this file. */
void vApplicationIdleHook( void )
{
}
/*-----------------------------------------------------------*/
/* The following four functions are here just to allow all three build
configurations to use the same vector table. They are not used in this
demo, but linker errors will result if they are not defined. They can
be ignored. */
void vT0_1_ISR_Wrapper( void ) {}
void vT2_3_ISR_Wrapper( void ) {}
void vEMAC_ISR_Wrapper( void ) {}
void vTimer2_ISR_Wrapper( void ) {}
volatile unsigned long ulHighFrequencyTickCount = 0;

@ -0,0 +1,671 @@
/*
FreeRTOS V6.0.5 - Copyright (C) 2010 Real Time Engineers Ltd.
***************************************************************************
* *
* If you are: *
* *
* + New to FreeRTOS, *
* + Wanting to learn FreeRTOS or multitasking in general quickly *
* + Looking for basic training, *
* + Wanting to improve your FreeRTOS skills and productivity *
* *
* then take a look at the FreeRTOS eBook *
* *
* "Using the FreeRTOS Real Time Kernel - a Practical Guide" *
* http://www.FreeRTOS.org/Documentation *
* *
* A pdf reference manual is also available. Both are usually delivered *
* to your inbox within 20 minutes to two hours when purchased between 8am *
* and 8pm GMT (although please allow up to 24 hours in case of *
* exceptional circumstances). Thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
***NOTE*** The exception to the GPL is included to allow you to distribute
a combined work that includes FreeRTOS without being obliged to provide the
source code for proprietary components outside of the FreeRTOS kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
1 tab == 4 spaces!
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
/* ****************************************************************************
* This project includes a lot of tasks and tests and is therefore complex.
* If you would prefer a much simpler project to get started with then select
* the 'Blinky' build configuration within the HEW IDE.
* ****************************************************************************
*
* Creates all the demo application tasks, then starts the scheduler. The web
* documentation provides more details of the standard demo application tasks,
* which provide no particular functionality but do provide a good example of
* how to use the FreeRTOS API. The tasks defined in flop.c are included in the
* set of standard demo tasks to ensure the floating point unit gets some
* exercise.
*
* In addition to the standard demo tasks, the following tasks and tests are
* defined and/or created within this file:
*
* Webserver ("uIP") task - This serves a number of dynamically generated WEB
* pages to a standard WEB browser. The IP and MAC addresses are configured by
* constants defined at the bottom of FreeRTOSConfig.h. Use either a standard
* Ethernet cable to connect through a hug, or a cross over (point to point)
* cable to connect directly. Ensure the IP address used is compatible with the
* IP address of the machine running the browser - the easiest way to achieve
* this is to ensure the first three octets of the IP addresses are the same.
*
* "Reg test" tasks - These fill the registers with known values, then check
* that each register still contains its expected value. Each task uses
* different values. The tasks run with very low priority so get preempted
* very frequently. A check variable is incremented on each iteration of the
* test loop. A register containing an unexpected value is indicative of an
* error in the context switching mechanism and will result in a branch to a
* null loop - which in turn will prevent the check variable from incrementing
* any further and allow the check task (described below) to determine that an
* error has occurred. The nature of the reg test tasks necessitates that they
* are written in assembly code.
*
* "Check" task - This only executes every five seconds but has a high priority
* to ensure it gets processor time. Its main function is to check that all the
* standard demo tasks are still operational. While no errors have been
* discovered the check task will toggle LED 5 every 5 seconds - the toggle
* rate increasing to 200ms being a visual indication that at least one task has
* reported unexpected behaviour.
*
* "High frequency timer test" - A high frequency periodic interrupt is
* generated using a timer - the interrupt is assigned a priority above
* configMAX_SYSCALL_INTERRUPT_PRIORITY so should not be effected by anything
* the kernel is doing. The frequency and priority of the interrupt, in
* combination with other standard tests executed in this demo, should result
* in interrupts nesting at least 3 and probably 4 deep. This test is only
* included in build configurations that have the optimiser switched on. In
* optimised builds the count of high frequency ticks is used as the time base
* for the run time stats.
*
* *NOTE 1* If LED5 is toggling every 5 seconds then all the demo application
* tasks are executing as expected and no errors have been reported in any
* tasks. The toggle rate increasing to 200ms indicates that at least one task
* has reported unexpected behaviour.
*
* *NOTE 2* vApplicationSetupTimerInterrupt() is called by the kernel to let
* the application set up a timer to generate the tick interrupt. In this
* example a compare match timer is used for this purpose.
*
* *NOTE 3* The CPU must be in Supervisor mode when the scheduler is started.
* The PowerON_Reset_PC() supplied in resetprg.c with this demo has
* Change_PSW_PM_to_UserMode() commented out to ensure this is the case.
*
* *NOTE 4* The IntQueue common demo tasks test interrupt nesting and make use
* of all the 8bit timers (as two cascaded 16bit units).
*/
/* Hardware specific includes. */
#include "iodefine.h"
/* Kernel includes. */
#include "FreeRTOS.h"
#include "task.h"
/* Standard demo includes. */
#include "partest.h"
#include "flash.h"
#include "IntQueue.h"
#include "BlockQ.h"
#include "death.h"
#include "integer.h"
#include "blocktim.h"
#include "semtest.h"
#include "PollQ.h"
#include "GenQTest.h"
#include "QPeek.h"
#include "recmutex.h"
#include "flop.h"
/* Values that are passed into the reg test tasks using the task parameter. The
tasks check that the values are passed in correctly. */
#define mainREG_TEST_1_PARAMETER ( 0x12121212UL )
#define mainREG_TEST_2_PARAMETER ( 0x12345678UL )
/* Priorities at which the tasks are created. */
#define mainCHECK_TASK_PRIORITY ( configMAX_PRIORITIES - 1 )
#define mainQUEUE_POLL_PRIORITY ( tskIDLE_PRIORITY + 1 )
#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1 )
#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 2 )
#define mainCREATOR_TASK_PRIORITY ( tskIDLE_PRIORITY + 3 )
#define mainFLASH_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 )
#define mainuIP_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 )
#define mainINTEGER_TASK_PRIORITY ( tskIDLE_PRIORITY )
#define mainGEN_QUEUE_TASK_PRIORITY ( tskIDLE_PRIORITY )
#define mainFLOP_TASK_PRIORITY ( tskIDLE_PRIORITY )
/* The WEB server uses string handling functions, which in turn use a bit more
stack than most of the other tasks. */
#define mainuIP_STACK_SIZE ( configMINIMAL_STACK_SIZE * 3 )
/* The LED toggled by the check task. */
#define mainCHECK_LED ( 5 )
/* The rate at which mainCHECK_LED will toggle when all the tasks are running
without error. Controlled by the check task as described at the top of this
file. */
#define mainNO_ERROR_CYCLE_TIME ( 5000 / portTICK_RATE_MS )
/* The rate at which mainCHECK_LED will toggle when an error has been reported
by at least one task. Controlled by the check task as described at the top of
this file. */
#define mainERROR_CYCLE_TIME ( 200 / portTICK_RATE_MS )
/*
* vApplicationMallocFailedHook() will only be called if
* configUSE_MALLOC_FAILED_HOOK is set to 1 in FreeRTOSConfig.h. It is a hook
* function that will execute if a call to pvPortMalloc() fails.
* pvPortMalloc() is called internally by the kernel whenever a task, queue or
* semaphore is created. It is also called by various parts of the demo
* application.
*/
void vApplicationMallocFailedHook( void );
/*
* vApplicationIdleHook() will only be called if configUSE_IDLE_HOOK is set to 1
* in FreeRTOSConfig.h. It is a hook function that is called on each iteration
* of the idle task. It is essential that code added to this hook function
* never attempts to block in any way (for example, call xQueueReceive() with
* a block time specified). If the application makes use of the vTaskDelete()
* API function (as this demo application does) then it is also important that
* vApplicationIdleHook() is permitted to return to its calling function because
* it is the responsibility of the idle task to clean up memory allocated by the
* kernel to any task that has since been deleted.
*/
void vApplicationIdleHook( void );
/*
* vApplicationStackOverflowHook() will only be called if
* configCHECK_FOR_STACK_OVERFLOW is set to a non-zero value. The handle and
* name of the offending task should be passed in the function parameters, but
* it is possible that the stack overflow will have corrupted these - in which
* case pxCurrentTCB can be inspected to find the same information.
*/
void vApplicationStackOverflowHook( xTaskHandle *pxTask, signed char *pcTaskName );
/*
* The reg test tasks as described at the top of this file.
*/
static void prvRegTest1Task( void *pvParameters );
static void prvRegTest2Task( void *pvParameters );
/*
* The actual implementation of the reg test functionality, which, because of
* the direct register access, have to be in assembly.
*/
static void prvRegTest1Implementation( void ) __attribute__((naked));
static void prvRegTest2Implementation( void ) __attribute__((naked));
/*
* The check task as described at the top of this file.
*/
static void prvCheckTask( void *pvParameters );
/*
* Contains the implementation of the WEB server.
*/
extern void vuIP_Task( void *pvParameters );
/*-----------------------------------------------------------*/
/* Variables that are incremented on each iteration of the reg test tasks -
provided the tasks have not reported any errors. The check task inspects these
variables to ensure they are still incrementing as expected. If a variable
stops incrementing then it is likely that its associate task has stalled. */
unsigned long ulRegTest1CycleCount = 0UL, ulRegTest2CycleCount = 0UL;
/* The status message that is displayed at the bottom of the "task stats" web
page, which is served by the uIP task. This will report any errors picked up
by the reg test task. */
static const char *pcStatusMessage = NULL;
/*-----------------------------------------------------------*/
void main(void)
{
extern void HardwareSetup( void );
/* Renesas provided CPU configuration routine. The clocks are configured in
here. */
HardwareSetup();
/* Turn all LEDs off. */
vParTestInitialise();
/* Start the reg test tasks which test the context switching mechanism. */
xTaskCreate( prvRegTest1Task, "RegTst1", configMINIMAL_STACK_SIZE, ( void * ) mainREG_TEST_1_PARAMETER, tskIDLE_PRIORITY, NULL );
xTaskCreate( prvRegTest2Task, "RegTst2", configMINIMAL_STACK_SIZE, ( void * ) mainREG_TEST_2_PARAMETER, tskIDLE_PRIORITY, NULL );
/* The web server task. */
xTaskCreate( vuIP_Task, "uIP", mainuIP_STACK_SIZE, NULL, mainuIP_TASK_PRIORITY, NULL );
/* Start the check task as described at the top of this file. */
xTaskCreate( prvCheckTask, "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );
/* Create the standard demo tasks. */
vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );
vCreateBlockTimeTasks();
vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );
vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );
vStartIntegerMathTasks( mainINTEGER_TASK_PRIORITY );
vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY );
vStartLEDFlashTasks( mainFLASH_TASK_PRIORITY );
vStartQueuePeekTasks();
vStartRecursiveMutexTasks();
vStartInterruptQueueTasks();
vStartMathTasks( mainFLOP_TASK_PRIORITY );
/* The suicide tasks must be created last as they need to know how many
tasks were running prior to their creation in order to ascertain whether
or not the correct/expected number of tasks are running at any given time. */
vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY );
/* Start the tasks running. */
vTaskStartScheduler();
/* If all is well we will never reach here as the scheduler will now be
running. If we do reach here then it is likely that there was insufficient
heap available for the idle task to be created. */
for( ;; );
}
/*-----------------------------------------------------------*/
static void prvCheckTask( void *pvParameters )
{
static volatile unsigned long ulLastRegTest1CycleCount = 0UL, ulLastRegTest2CycleCount = 0UL;
portTickType xNextWakeTime, xCycleFrequency = mainNO_ERROR_CYCLE_TIME;
extern void vSetupHighFrequencyTimer( void );
/* If this is being executed then the kernel has been started. Start the high
frequency timer test as described at the top of this file. This is only
included in the optimised build configuration - otherwise it takes up too much
CPU time. */
#ifdef INCLUDE_HIGH_FREQUENCY_TIMER_TEST
vSetupHighFrequencyTimer();
#endif
/* Initialise xNextWakeTime - this only needs to be done once. */
xNextWakeTime = xTaskGetTickCount();
for( ;; )
{
/* Place this task in the blocked state until it is time to run again. */
vTaskDelayUntil( &xNextWakeTime, xCycleFrequency );
/* Check the standard demo tasks are running without error. */
if( xAreGenericQueueTasksStillRunning() != pdTRUE )
{
pcStatusMessage = "Error: GenQueue";
}
else if( xAreQueuePeekTasksStillRunning() != pdTRUE )
{
pcStatusMessage = "Error: QueuePeek\r\n";
}
else if( xAreBlockingQueuesStillRunning() != pdTRUE )
{
pcStatusMessage = "Error: BlockQueue\r\n";
}
else if( xAreBlockTimeTestTasksStillRunning() != pdTRUE )
{
pcStatusMessage = "Error: BlockTime\r\n";
}
else if( xAreSemaphoreTasksStillRunning() != pdTRUE )
{
pcStatusMessage = "Error: SemTest\r\n";
}
else if( xArePollingQueuesStillRunning() != pdTRUE )
{
pcStatusMessage = "Error: PollQueue\r\n";
}
else if( xIsCreateTaskStillRunning() != pdTRUE )
{
pcStatusMessage = "Error: Death\r\n";
}
else if( xAreIntegerMathsTaskStillRunning() != pdTRUE )
{
pcStatusMessage = "Error: IntMath\r\n";
}
else if( xAreRecursiveMutexTasksStillRunning() != pdTRUE )
{
pcStatusMessage = "Error: RecMutex\r\n";
}
else if( xAreIntQueueTasksStillRunning() != pdPASS )
{
pcStatusMessage = "Error: IntQueue\r\n";
}
else if( xAreMathsTaskStillRunning() != pdPASS )
{
pcStatusMessage = "Error: Flop\r\n";
}
/* Check the reg test tasks are still cycling. They will stop incrementing
their loop counters if they encounter an error. */
if( ulRegTest1CycleCount == ulLastRegTest1CycleCount )
{
pcStatusMessage = "Error: RegTest1\r\n";
}
if( ulRegTest2CycleCount == ulLastRegTest2CycleCount )
{
pcStatusMessage = "Error: RegTest2\r\n";
}
ulLastRegTest1CycleCount = ulRegTest1CycleCount;
ulLastRegTest2CycleCount = ulRegTest2CycleCount;
/* Toggle the check LED to give an indication of the system status. If
the LED toggles every 5 seconds then everything is ok. A faster toggle
indicates an error. */
vParTestToggleLED( mainCHECK_LED );
/* Ensure the LED toggles at a faster rate if an error has occurred. */
if( pcStatusMessage != NULL )
{
/* Increase the rate at which this task cycles, which will increase the
rate at which mainCHECK_LED flashes to give visual feedback that an error
has occurred. */
xCycleFrequency = mainERROR_CYCLE_TIME;
}
}
}
/*-----------------------------------------------------------*/
/* The RX port uses this callback function to configure its tick interrupt.
This allows the application to choose the tick interrupt source. */
void vApplicationSetupTimerInterrupt( void )
{
/* Enable compare match timer 0. */
MSTP( CMT0 ) = 0;
/* Interrupt on compare match. */
CMT0.CMCR.BIT.CMIE = 1;
/* Set the compare match value. */
CMT0.CMCOR = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / configTICK_RATE_HZ ) -1 ) / 8 );
/* Divide the PCLK by 8. */
CMT0.CMCR.BIT.CKS = 0;
/* Enable the interrupt... */
_IEN( _CMT0_CMI0 ) = 1;
/* ...and set its priority to the application defined kernel priority. */
_IPR( _CMT0_CMI0 ) = configKERNEL_INTERRUPT_PRIORITY;
/* Start the timer. */
CMT.CMSTR0.BIT.STR0 = 1;
}
/*-----------------------------------------------------------*/
/* This function is explained by the comments above its prototype at the top
of this file. */
void vApplicationMallocFailedHook( void )
{
for( ;; );
}
/*-----------------------------------------------------------*/
/* This function is explained by the comments above its prototype at the top
of this file. */
void vApplicationStackOverflowHook( xTaskHandle *pxTask, signed char *pcTaskName )
{
for( ;; );
}
/*-----------------------------------------------------------*/
/* This function is explained by the comments above its prototype at the top
of this file. */
void vApplicationIdleHook( void )
{
}
/*-----------------------------------------------------------*/
/* This function is explained in the comments at the top of this file. */
static void prvRegTest1Task( void *pvParameters )
{
if( ( ( unsigned long ) pvParameters ) != mainREG_TEST_1_PARAMETER )
{
/* The parameter did not contain the expected value. */
for( ;; )
{
/* Stop the tick interrupt so its obvious something has gone wrong. */
taskDISABLE_INTERRUPTS();
}
}
/* This is an asm function that never returns. */
prvRegTest1Implementation();
}
/*-----------------------------------------------------------*/
/* This function is explained in the comments at the top of this file. */
static void prvRegTest2Task( void *pvParameters )
{
if( ( ( unsigned long ) pvParameters ) != mainREG_TEST_2_PARAMETER )
{
/* The parameter did not contain the expected value. */
for( ;; )
{
/* Stop the tick interrupt so its obvious something has gone wrong. */
taskDISABLE_INTERRUPTS();
}
}
/* This is an asm function that never returns. */
prvRegTest2Implementation();
}
/*-----------------------------------------------------------*/
char *pcGetTaskStatusMessage( void )
{
/* Not bothered about a critical section here although technically because of
the task priorities the pointer could change it will be atomic if not near
atomic and its not critical. */
if( pcStatusMessage == NULL )
{
return "All tasks running without error";
}
else
{
return ( char * ) pcStatusMessage;
}
}
/*-----------------------------------------------------------*/
/* This function is explained in the comments at the top of this file. */
static void prvRegTest1Implementation( void )
{
__asm volatile
(
/* Put a known value in each register. */
"MOV #1, R1 \n" \
"MOV #2, R2 \n" \
"MOV #3, R3 \n" \
"MOV #4, R4 \n" \
"MOV #5, R5 \n" \
"MOV #6, R6 \n" \
"MOV #7, R7 \n" \
"MOV #8, R8 \n" \
"MOV #9, R9 \n" \
"MOV #10, R10 \n" \
"MOV #11, R11 \n" \
"MOV #12, R12 \n" \
"MOV #13, R13 \n" \
"MOV #14, R14 \n" \
"MOV #15, R15 \n" \
/* Loop, checking each itteration that each register still contains the
expected value. */
"TestLoop1: \n" \
/* Push the registers that are going to get clobbered. */
"PUSHM R14-R15 \n" \
/* Increment the loop counter to show this task is still getting CPU time. */
"MOV #_ulRegTest1CycleCount, R14 \n" \
"MOV [ R14 ], R15 \n" \
"ADD #1, R15 \n" \
"MOV R15, [ R14 ] \n" \
/* Yield to extend the test coverage. Set the bit in the ITU SWINTR register. */
"MOV #1, R14 \n" \
"MOV #0872E0H, R15 \n" \
"MOV.B R14, [R15] \n" \
"NOP \n" \
"NOP \n" \
/* Restore the clobbered registers. */
"POPM R14-R15 \n" \
/* Now compare each register to ensure it still contains the value that was
set before this loop was entered. */
"CMP #1, R1 \n" \
"BNE RegTest1Error \n" \
"CMP #2, R2 \n" \
"BNE RegTest1Error \n" \
"CMP #3, R3 \n" \
"BNE RegTest1Error \n" \
"CMP #4, R4 \n" \
"BNE RegTest1Error \n" \
"CMP #5, R5 \n" \
"BNE RegTest1Error \n" \
"CMP #6, R6 \n" \
"BNE RegTest1Error \n" \
"CMP #7, R7 \n" \
"BNE RegTest1Error \n" \
"CMP #8, R8 \n" \
"BNE RegTest1Error \n" \
"CMP #9, R9 \n" \
"BNE RegTest1Error \n" \
"CMP #10, R10 \n" \
"BNE RegTest1Error \n" \
"CMP #11, R11 \n" \
"BNE RegTest1Error \n" \
"CMP #12, R12 \n" \
"BNE RegTest1Error \n" \
"CMP #13, R13 \n" \
"BNE RegTest1Error \n" \
"CMP #14, R14 \n" \
"BNE RegTest1Error \n" \
"CMP #15, R15 \n" \
"BNE RegTest1Error \n" \
/* All comparisons passed, start a new itteratio of this loop. */
"BRA TestLoop1 \n" \
"RegTest1Error: \n" \
/* A compare failed, just loop here so the loop counter stops incrementing
- causing the check task to indicate the error. */
"BRA RegTest1Error "
);
}
/*-----------------------------------------------------------*/
/* This function is explained in the comments at the top of this file. */
static void prvRegTest2Implementation( void )
{
__asm volatile
(
/* Put a known value in each register. */
"MOV #10H, R1 \n" \
"MOV #20H, R2 \n" \
"MOV #30H, R3 \n" \
"MOV #40H, R4 \n" \
"MOV #50H, R5 \n" \
"MOV #60H, R6 \n" \
"MOV #70H, R7 \n" \
"MOV #80H, R8 \n" \
"MOV #90H, R9 \n" \
"MOV #100H, R10 \n" \
"MOV #110H, R11 \n" \
"MOV #120H, R12 \n" \
"MOV #130H, R13 \n" \
"MOV #140H, R14 \n" \
"MOV #150H, R15 \n" \
/* Loop, checking each itteration that each register still contains the
expected value. */
"TestLoop2: \n" \
/* Push the registers that are going to get clobbered. */
"PUSHM R14-R15 \n" \
/* Increment the loop counter to show this task is still getting CPU time. */
"MOV #_ulRegTest2CycleCount, R14 \n" \
"MOV [ R14 ], R15 \n" \
"ADD #1, R15 \n" \
"MOV R15, [ R14 ] \n" \
/* Restore the clobbered registers. */
"POPM R14-R15 \n" \
/* Now compare each register to ensure it still contains the value that was
set before this loop was entered. */
"CMP #10H, R1 \n" \
"BNE RegTest2Error \n" \
"CMP #20H, R2 \n" \
"BNE RegTest2Error \n" \
"CMP #30H, R3 \n" \
"BNE RegTest2Error \n" \
"CMP #40H, R4 \n" \
"BNE RegTest2Error \n" \
"CMP #50H, R5 \n" \
"BNE RegTest2Error \n" \
"CMP #60H, R6 \n" \
"BNE RegTest2Error \n" \
"CMP #70H, R7 \n" \
"BNE RegTest2Error \n" \
"CMP #80H, R8 \n" \
"BNE RegTest2Error \n" \
"CMP #90H, R9 \n" \
"BNE RegTest2Error \n" \
"CMP #100H, R10 \n" \
"BNE RegTest2Error \n" \
"CMP #110H, R11 \n" \
"BNE RegTest2Error \n" \
"CMP #120H, R12 \n" \
"BNE RegTest2Error \n" \
"CMP #130H, R13 \n" \
"BNE RegTest2Error \n" \
"CMP #140H, R14 \n" \
"BNE RegTest2Error \n" \
"CMP #150H, R15 \n" \
"BNE RegTest2Error \n" \
/* All comparisons passed, start a new itteratio of this loop. */
"BRA TestLoop2 \n" \
"RegTest2Error: \n" \
/* A compare failed, just loop here so the loop counter stops incrementing
- causing the check task to indicate the error. */
"BRA RegTest2Error "
);
}

@ -0,0 +1,270 @@
/*
FreeRTOS V6.0.5 - Copyright (C) 2010 Real Time Engineers Ltd.
***************************************************************************
* *
* If you are: *
* *
* + New to FreeRTOS, *
* + Wanting to learn FreeRTOS or multitasking in general quickly *
* + Looking for basic training, *
* + Wanting to improve your FreeRTOS skills and productivity *
* *
* then take a look at the FreeRTOS eBook *
* *
* "Using the FreeRTOS Real Time Kernel - a Practical Guide" *
* http://www.FreeRTOS.org/Documentation *
* *
* A pdf reference manual is also available. Both are usually delivered *
* to your inbox within 20 minutes to two hours when purchased between 8am *
* and 8pm GMT (although please allow up to 24 hours in case of *
* exceptional circumstances). Thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
***NOTE*** The exception to the GPL is included to allow you to distribute
a combined work that includes FreeRTOS without being obliged to provide the
source code for proprietary components outside of the FreeRTOS kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
1 tab == 4 spaces!
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
/* Standard includes. */
#include <string.h>
/* Scheduler includes. */
#include "FreeRTOS.h"
#include "task.h"
#include "semphr.h"
/* uip includes. */
#include "net/uip.h"
#include "net/uip_arp.h"
#include "apps/httpd/httpd.h"
#include "sys/timer.h"
#include "net/clock-arch.h"
#include "r_ether.h"
/* Demo includes. */
#include "ParTest.h"
/*-----------------------------------------------------------*/
/* How long to wait before attempting to connect the MAC again. */
#define uipINIT_WAIT ( 100 / portTICK_RATE_MS )
/* Shortcut to the header within the Rx buffer. */
#define xHeader ((struct uip_eth_hdr *) &uip_buf[ 0 ])
/* Standard constant. */
#define uipTOTAL_FRAME_HEADER_SIZE 54
/*-----------------------------------------------------------*/
/*
* Setup the MAC address in the MAC itself, and in the uIP stack.
*/
static void prvSetMACAddress( void );
/*
* Port functions required by the uIP stack.
*/
void clock_init( void );
clock_time_t clock_time( void );
/*-----------------------------------------------------------*/
/* The semaphore used by the ISR to wake the uIP task. */
xSemaphoreHandle xEMACSemaphore = NULL;
/*-----------------------------------------------------------*/
void clock_init(void)
{
/* This is done when the scheduler starts. */
}
/*-----------------------------------------------------------*/
clock_time_t clock_time( void )
{
return xTaskGetTickCount();
}
/*-----------------------------------------------------------*/
void vuIP_Task( void *pvParameters )
{
portBASE_TYPE i, xDoneSomething;
uip_ipaddr_t xIPAddr;
struct timer periodic_timer, arp_timer;
( void ) pvParameters;
/* Initialise the uIP stack. */
timer_set( &periodic_timer, configTICK_RATE_HZ / 2 );
timer_set( &arp_timer, configTICK_RATE_HZ * 10 );
uip_init();
uip_ipaddr( &xIPAddr, configIP_ADDR0, configIP_ADDR1, configIP_ADDR2, configIP_ADDR3 );
uip_sethostaddr( &xIPAddr );
uip_ipaddr( &xIPAddr, configNET_MASK0, configNET_MASK1, configNET_MASK2, configNET_MASK3 );
uip_setnetmask( &xIPAddr );
prvSetMACAddress();
httpd_init();
/* Create the semaphore used to wake the uIP task. */
vSemaphoreCreateBinary( xEMACSemaphore );
/* Initialise the MAC. */
vInitEmac();
while( lEMACWaitForLink() != pdPASS )
{
vTaskDelay( uipINIT_WAIT );
}
for( ;; )
{
xDoneSomething = pdFALSE;
/* Is there received data ready to be processed? */
uip_len = ( unsigned short ) ulEMACRead();
if( ( uip_len > 0 ) && ( uip_buf != NULL ) )
{
/* Standard uIP loop taken from the uIP manual. */
if( xHeader->type == htons( UIP_ETHTYPE_IP ) )
{
uip_arp_ipin();
uip_input();
/* If the above function invocation resulted in data that
should be sent out on the network, the global variable
uip_len is set to a value > 0. */
if( uip_len > 0 )
{
uip_arp_out();
vEMACWrite();
}
xDoneSomething = pdTRUE;
}
else if( xHeader->type == htons( UIP_ETHTYPE_ARP ) )
{
uip_arp_arpin();
/* If the above function invocation resulted in data that
should be sent out on the network, the global variable
uip_len is set to a value > 0. */
if( uip_len > 0 )
{
vEMACWrite();
}
xDoneSomething = pdTRUE;
}
}
if( timer_expired( &periodic_timer ) && ( uip_buf != NULL ) )
{
timer_reset( &periodic_timer );
for( i = 0; i < UIP_CONNS; i++ )
{
uip_periodic( i );
/* If the above function invocation resulted in data that
should be sent out on the network, the global variable
uip_len is set to a value > 0. */
if( uip_len > 0 )
{
uip_arp_out();
vEMACWrite();
}
}
/* Call the ARP timer function every 10 seconds. */
if( timer_expired( &arp_timer ) )
{
timer_reset( &arp_timer );
uip_arp_timer();
}
xDoneSomething = pdTRUE;
}
if( xDoneSomething == pdFALSE )
{
/* We did not receive a packet, and there was no periodic
processing to perform. Block for a fixed period. If a packet
is received during this period we will be woken by the ISR
giving us the Semaphore. */
xSemaphoreTake( xEMACSemaphore, configTICK_RATE_HZ / 20 );
}
}
}
/*-----------------------------------------------------------*/
static void prvSetMACAddress( void )
{
struct uip_eth_addr xAddr;
/* Configure the MAC address in the uIP stack. */
xAddr.addr[ 0 ] = configMAC_ADDR0;
xAddr.addr[ 1 ] = configMAC_ADDR1;
xAddr.addr[ 2 ] = configMAC_ADDR2;
xAddr.addr[ 3 ] = configMAC_ADDR3;
xAddr.addr[ 4 ] = configMAC_ADDR4;
xAddr.addr[ 5 ] = configMAC_ADDR5;
uip_setethaddr( xAddr );
}
/*-----------------------------------------------------------*/
void vApplicationProcessFormInput( char *pcInputString )
{
char *c;
/* Process the form input sent by the IO page of the served HTML. */
c = strstr( pcInputString, "?" );
if( c )
{
/* Turn the LED's on or off in accordance with the check box status. */
if( strstr( c, "LED0=1" ) != NULL )
{
/* Turn LEDs on. */
vParTestSetLED( 7, 1 );
vParTestSetLED( 8, 1 );
vParTestSetLED( 9, 1 );
vParTestSetLED( 10, 1 );
}
else
{
/* Turn LED 4 off. */
vParTestSetLED( 7, 0 );
vParTestSetLED( 8, 0 );
vParTestSetLED( 9, 0 );
vParTestSetLED( 10, 0 );
}
}
}

@ -0,0 +1,614 @@
/***********************************************************************/
/* */
/* FILE :vects.c */
/* DATE :Wed, Aug 25, 2010 */
/* DESCRIPTION :Vector Table */
/* CPU TYPE :Other */
/* */
/* This file is generated by KPIT GNU Project Generator. */
/* */
/***********************************************************************/
#include "inthandler.h"
typedef void (*fp) (void);
extern void start(void);
extern void stack (void);
extern void vTickISR( void );
extern void vSoftwareInterruptISR( void );
extern void vT0_1_ISR_Wrapper( void );
extern void vT2_3_ISR_Wrapper( void );
extern void vEMAC_ISR_Wrapper( void );
extern void vTimer2_ISR_Wrapper( void );
#define FVECT_SECT __attribute__ ((section (".fvectors")))
const fp HardwareVectors[] FVECT_SECT = {
//;0xffffff80 Reserved
(fp)0,
//;0xffffff84 Reserved
(fp)0,
//;0xffffff88 Reserved
(fp)0,
//;0xffffff8C Reserved
(fp)0,
//;0xffffff90 Reserved
(fp)0,
//;0xffffff94 Reserved
(fp)0,
//;0xffffff98 Reserved
(fp)0,
//;0xffffff9C Reserved
(fp)0,
//;0xffffffA0 Reserved
(fp)0,
//;0xffffffA4 Reserved
(fp)0,
//;0xffffffA8 Reserved
(fp)0,
//;0xffffffAC Reserved
(fp)0,
//;0xffffffB0 Reserved
(fp)0,
//;0xffffffB4 Reserved
(fp)0,
//;0xffffffB8 Reserved
(fp)0,
//;0xffffffBC Reserved
(fp)0,
//;0xffffffC0 Reserved
(fp)0,
//;0xffffffC4 Reserved
(fp)0,
//;0xffffffC8 Reserved
(fp)0,
//;0xffffffCC Reserved
(fp)0,
//;0xffffffd0 Exception(Supervisor Instruction)
INT_Excep_SuperVisorInst,
//;0xffffffd4 Reserved
(fp)0,
//;0xffffffd8 Reserved
(fp)0,
//;0xffffffdc Exception(Undefined Instruction)
INT_Excep_UndefinedInst,
//;0xffffffe0 Reserved
(fp)0,
//;0xffffffe4 Exception(Floating Point)
INT_Excep_FloatingPoint,
//;0xffffffe8 Reserved
(fp)0,
//;0xffffffec Reserved
(fp)0,
//;0xfffffff0 Reserved
(fp)0,
//;0xfffffff4 Reserved
(fp)0,
//;0xfffffff8 NMI
INT_NonMaskableInterrupt,
//;0xfffffffc RESET
//;<<VECTOR DATA START (POWER ON RESET)>>
//;Power On Reset PC
start
//;<<VECTOR DATA END (POWER ON RESET)>>
};
#define RVECT_SECT __attribute__ ((section (".rvectors")))
const fp RelocatableVectors[] RVECT_SECT = {
//;0x0000 Reserved
(fp)0,
//;0x0004 Reserved
(fp)0,
//;0x0008 Reserved
(fp)0,
//;0x000C Reserved
(fp)0,
//;0x0010 Reserved
(fp)0,
//;0x0014 Reserved
(fp)0,
//;0x0018 Reserved
(fp)0,
//;0x001C Reserved
(fp)0,
//;0x0020 Reserved
(fp)0,
//;0x0024 Reserved
(fp)0,
//;0x0028 Reserved
(fp)0,
//;0x002C Reserved
(fp)0,
//;0x0030 Reserved
(fp)0,
//;0x0034 Reserved
(fp)0,
//;0x0038 Reserved
(fp)0,
//;0x003C Reserved
(fp)0,
//;0x0040 BUSERR
(fp)INT_Excep_BUSERR,
//;0x0044 Reserved
(fp)0,
//;0x0048 Reserved
(fp)0,
//;0x004C Reserved
(fp)0,
//;0x0050 Reserved
(fp)0,
//;0x0054 FCUERR
(fp)INT_Excep_FCU_FCUERR,
//;0x0058 Reserved
(fp)0,
//;0x005C FRDYI
(fp)INT_Excep_FCU_FRDYI,
//;0x0060 Reserved
(fp)0,
//;0x0064 Reserved
(fp)0,
//;0x0068 Reserved
(fp)0,
//;0x006C Reserved
(fp)vSoftwareInterruptISR,
//;0x0070 CMTU0_CMT0
(fp)vTickISR,
//;0x0074 CMTU0_CMT1
(fp)INT_Excep_CMTU0_CMT1,
//;0x0078 CMTU1_CMT2
(fp)vTimer2_ISR_Wrapper,
//;0x007C CMTU1_CMT3
(fp)INT_Excep_CMTU1_CMT3,
//;0x0080 Ether
(fp)vEMAC_ISR_Wrapper,
//;0x0084 Reserved
(fp)0,
//;0x0088 Reserved
(fp)0,
//;0x008C Reserved
(fp)0,
//;0x0090 Reserved
(fp)0,
//;0x0094 Reserved
(fp)0,
//;0x0098 Reserved
(fp)0,
//;0x009C Reserved
(fp)0,
//;0x00A0 Reserved
(fp)0,
//;0x00A4 Reserved
(fp)0,
//;0x00A8 Reserved
(fp)0,
//;0x00AC Reserved
(fp)0,
//;0x00B0 Reserved
(fp)0,
//;0x00B4 Reserved
(fp)0,
//;0x00B8 Reserved
(fp)0,
//;0x00BC Reserved
(fp)0,
//;0x00C0 Reserved
(fp)0,
//;0x00C4 Reserved
(fp)0,
//;0x00C8 Reserved
(fp)0,
//;0x00CC Reserved
(fp)0,
//;0x00D0 Reserved
(fp)0,
//;0x00D4 Reserved
(fp)0,
//;0x00D8 Reserved
(fp)0,
//;0x00DC Reserved
(fp)0,
//;0x00E0 Reserved
(fp)0,
//;0x00E4 Reserved
(fp)0,
//;0x00E8 Reserved
(fp)0,
//;0x00EC Reserved
(fp)0,
//;0x00F0 Reserved
(fp)0,
//;0x00F4 Reserved
(fp)0,
//;0x00F8 Reserved
(fp)0,
//;0x00FC Reserved
(fp)0,
//;0x0100 IRQ0
(fp)INT_Excep_IRQ0,
//;0x0104 IRQ1
(fp)INT_Excep_IRQ1,
//;0x0108 IRQ2
(fp)INT_Excep_IRQ2,
//;0x010C IRQ3
(fp)INT_Excep_IRQ3,
//;0x0110 IRQ4
(fp)INT_Excep_IRQ4,
//;0x0114 IRQ5
(fp)INT_Excep_IRQ5,
//;0x0118 IRQ6
(fp)INT_Excep_IRQ6,
//;0x011C IRQ7
(fp)INT_Excep_IRQ7,
//;0x0120 IRQ8
(fp)INT_Excep_IRQ8,
//;0x0124 IRQ9
(fp)INT_Excep_IRQ9,
//;0x0128 IRQ10
(fp)INT_Excep_IRQ10,
//;0x012C IRQ11
(fp)INT_Excep_IRQ11,
//;0x0130 IRQ12
(fp)INT_Excep_IRQ12,
//;0x0134 IRQ13
(fp)INT_Excep_IRQ13,
//;0x0138 IRQ14
(fp)INT_Excep_IRQ14,
//;0x013C IRQ15
(fp)INT_Excep_IRQ15,
//;0x0140 Reserved
(fp)0,
//;0x0144 Reserved
(fp)0,
//;0x0148 Reserved
(fp)0,
//;0x014C Reserved
(fp)0,
//;0x0150 Reserved
(fp)0,
//;0x0154 Reserved
(fp)0,
//;0x0158 Reserved
(fp)0,
//;0x015C Reserved
(fp)0,
//;0x0160 Reserved
(fp)0,
//;0x0164 Reserved
(fp)0,
//;0x0168 Reserved
(fp)0,
//;0x016C Reserved
(fp)0,
//;0x0170 Reserved
(fp)0,
//;0x0174 Reserved
(fp)0,
//;0x0178 Reserved
(fp)0,
//;0x017C Reserved
(fp)0,
//;0x0180 WDT_WOVI
(fp)INT_Excep_WDT_WOVI,
//;0x0184 Reserved
(fp)0,
//;0x0188 AD0_ADI0
(fp)INT_Excep_AD0_ADI0,
//;0x018C AD1_ADI1
(fp)INT_Excep_AD1_ADI1,
//;0x0190 AD2_ADI2
(fp)INT_Excep_AD2_ADI2,
//;0x0194 AD3_ADI3
(fp)INT_Excep_AD3_ADI3,
//;0x0198 Reserved
(fp)0,
//;0x019C Reserved
(fp)0,
//;0x01A0 TPU0_TGI0A
(fp)INT_Excep_TPU0_TGI0A,
//;0x01A4 TPU0_TGI0B
(fp)INT_Excep_TPU0_TGI0B,
//;0x01A8 TPU0_TGI0C
(fp)INT_Excep_TPU0_TGI0C,
//;0x01AC TPU0_TGI0D
(fp)INT_Excep_TPU0_TGI0D,
//;0x01B0 TPU0_TCI0V
(fp)INT_Excep_TPU0_TCI0V,
//;0x01B4 Reserved
(fp)0,
//;0x01B8 Reserved
(fp)0,
//;0x01BC TPU1_TGI1A
(fp)INT_Excep_TPU1_TGI1A,
//;0x01C0 TPU1_TGI1B
(fp)INT_Excep_TPU1_TGI1B,
//;0x01C4 Reserved
(fp)0,
//;0x01C8 Reserved
(fp)0,
//;0x01CC TPU1_TCI1V
(fp)INT_Excep_TPU1_TCI1V,
//;0x01D0 TPU1_TCI1U
(fp)INT_Excep_TPU1_TCI1U,
//;0x01D4 TPU2_TGI2A
(fp)INT_Excep_TPU2_TGI2A,
//;0x01D8 TPU2_TGI2B
(fp)INT_Excep_TPU2_TGI2B,
//;0x01DC Reserved
(fp)0,
//;0x01E0 TPU2_TCI2V
(fp)INT_Excep_TPU2_TCI2V,
//;0x01E4 TPU2_TCI2U
(fp)INT_Excep_TPU2_TCI2U,
//;0x01E8 TPU3_TGI3A
(fp)INT_Excep_TPU3_TGI3A,
//;0x01EC TPU3_TGI3B
(fp)INT_Excep_TPU3_TGI3B,
//;0x01F0 TPU3_TGI3C
(fp)INT_Excep_TPU3_TGI3C,
//;0x01F4 TPU3_TGI3D
(fp)INT_Excep_TPU3_TGI3D,
//;0x01F8 TPU3_TCI3V
(fp)INT_Excep_TPU3_TCI3V,
//;0x01FC TPU4_TGI4A
(fp)INT_Excep_TPU4_TGI4A,
//;0x0200 TPU4_TGI4B
(fp)INT_Excep_TPU4_TGI4B,
//;0x0204 Reserved
(fp)0,
//;0x0208 Reserved
(fp)0,
//;0x020C TPU4_TCI4V
(fp)INT_Excep_TPU4_TCI4V,
//;0x0210 TPU4_TCI4U
(fp)INT_Excep_TPU4_TCI4U,
//;0x0214 TPU5_TGI5A
(fp)INT_Excep_TPU5_TGI5A,
//;0x0218 TPU5_TGI5B
(fp)INT_Excep_TPU5_TGI5B,
//;0x021C Reserved
(fp)0,
//;0x0220 TPU5_TCI5V
(fp)INT_Excep_TPU5_TCI5V,
//;0x0224 TPU5_TCI5U
(fp)INT_Excep_TPU5_TCI5U,
//;0x0228 TPU6_TGI6A
(fp)INT_Excep_TPU6_TGI6A,
//;0x022C TPU6_TGI6B
(fp)INT_Excep_TPU6_TGI6B,
//;0x0230 TPU6_TGI6C
(fp)INT_Excep_TPU6_TGI6C,
//;0x0234 TPU6_TGI6D
(fp)INT_Excep_TPU6_TGI6D,
//;0x0238 TPU6_TCI6V
(fp)INT_Excep_TPU6_TCI6V,
//;0x023C Reserved
(fp)0,
//;0x0240 Reserved
(fp)0,
//;0x0244 TPU7_TGI7A
(fp)INT_Excep_TPU7_TGI7A,
//;0x0248 TPU7_TGI7B
(fp)INT_Excep_TPU7_TGI7B,
//;0x024C Reserved
(fp)0,
//;0x0250 Reserved
(fp)0,
//;0x0254 TPU7_TCI7V
(fp)INT_Excep_TPU7_TCI7V,
//;0x0258 TPU7_TCI7U
(fp)INT_Excep_TPU7_TCI7U,
//;0x025C TPU8_TGI8A
(fp)INT_Excep_TPU8_TGI8A,
//;0x0260 TPU8_TGI8B
(fp)INT_Excep_TPU8_TGI8B,
//;0x0264 Reserved
(fp)0,
//;0x0268 TPU8_TCI8V
(fp)INT_Excep_TPU8_TCI8V,
//;0x026C TPU8_TCI8U
(fp)INT_Excep_TPU8_TCI8U,
//;0x0270 TPU9_TGI9A
(fp)INT_Excep_TPU9_TGI9A,
//;0x0274 TPU9_TGI9B
(fp)INT_Excep_TPU9_TGI9B,
//;0x0278 TPU9_TGI9C
(fp)INT_Excep_TPU9_TGI9C,
//;0x027C TPU9_TGI9D
(fp)INT_Excep_TPU9_TGI9D,
//;0x0280 TPU9_TCI9V
(fp)INT_Excep_TPU9_TCI9V,
//;0x0284 TPU10_TGI10A
(fp)INT_Excep_TPU10_TGI10A,
//;0x0288 TPU10_TGI10B
(fp)INT_Excep_TPU10_TGI10B,
//;0x028C Reserved
(fp)0,
//;0x0290 Reserved
(fp)0,
//;0x0294 TPU10_TCI10V
(fp)INT_Excep_TPU10_TCI10V,
//;0x0298 TPU10_TCI10U
(fp)INT_Excep_TPU10_TCI10U,
//;0x029C TPU11_TGI11A
(fp)INT_Excep_TPU11_TGI11A,
//;0x02A0 TPU11_TGI11B
(fp)INT_Excep_TPU11_TGI11B,
//;0x02A4 Reserved
(fp)0,
//;0x02A8 TPU11_TCI11V
(fp)INT_Excep_TPU11_TCI11V,
//;0x02AC TPU11_TCI11U
(fp)INT_Excep_TPU11_TCI11U,
//;0x02B0 Reserved
(fp)0,
//;0x02B4 Reserved
(fp)0,
//;0x02B8 TMR0_CMI0A
(fp)vT0_1_ISR_Wrapper,
//;0x02BC TMR0_CMI0B
(fp)INT_Excep_TMR0_CMI0B,
//;0x02C0 TMR0_OV0I
(fp)INT_Excep_TMR0_OV0I,
//;0x02C4 TMR1_CMI1A
(fp)INT_Excep_TMR1_CMI1A,
//;0x02C8 TMR1_CMI1B
(fp)INT_Excep_TMR1_CMI1B,
//;0x02CC TMR1_OV1I
(fp)INT_Excep_TMR1_OV1I,
//;0x02D0 TMR2_CMI2A
(fp)vT2_3_ISR_Wrapper,
//;0x02D4 TMR2_CMI2B
(fp)INT_Excep_TMR2_CMI2B,
//;0x02D8 TMR2_OV2I
(fp)INT_Excep_TMR2_OV2I,
//;0x02DC TMR3_CMI3A
(fp)INT_Excep_TMR3_CMI3A,
//;0x02E0 TMR3_CMI3B
(fp)INT_Excep_TMR3_CMI3B,
//;0x02E4 TMR3_OV3I
(fp)INT_Excep_TMR3_OV3I,
//;0x02E8 Reserved
(fp)0,
//;0x02EC Reserved
(fp)0,
//;0x02F0 Reserved
(fp)0,
//;0x02F4 Reserved
(fp)0,
//;0x02F8 Reserved
(fp)0,
//;0x02FC Reserved
(fp)0,
//;0x0300 Reserved
(fp)0,
//;0x0304 Reserved
(fp)0,
//;0x0308 Reserved
(fp)0,
//;0x030C Reserved
(fp)0,
//;0x0310 Reserved
(fp)0,
//;0x0314 Reserved
(fp)0,
//;0x0318 DMAC_DMTEND0
(fp)INT_Excep_DMAC_DMTEND0,
//;0x031C DMAC_DMTEND1
(fp)INT_Excep_DMAC_DMTEND1,
//;0x0320 DMAC_DMTEND2
(fp)INT_Excep_DMAC_DMTEND2,
//;0x0324 DMAC_DMTEND3
(fp)INT_Excep_DMAC_DMTEND3,
//;0x0328 Reserved
(fp)0,
//;0x032C Reserved
(fp)0,
//;0x0330 Reserved
(fp)0,
//;0x0334 Reserved
(fp)0,
//;0x0338 Reserved
(fp)0,
//;0x033C Reserved
(fp)0,
//;0x0340 Reserved
(fp)0,
//;0x0344 Reserved
(fp)0,
//;0x0348 Reserved
(fp)0,
//;0x034C Reserved
(fp)0,
//;0x0350 Reserved
(fp)0,
//;0x0354 Reserved
(fp)0,
//;0x0358 SCI0_ERI0
(fp)INT_Excep_SCI0_ERI0,
//;0x035C SCI0_RXI0
(fp)INT_Excep_SCI0_RXI0,
//;0x0360 SCI0_TXI0
(fp)INT_Excep_SCI0_TXI0,
//;0x0364 SCI0_TEI0
(fp)INT_Excep_SCI0_TEI0,
//;0x0368 SCI1_ERI1
(fp)INT_Excep_SCI1_ERI1,
//;0x036C SCI1_RXI1
(fp)INT_Excep_SCI1_RXI1,
//;0x0370 SCI1_TXI1
(fp)INT_Excep_SCI1_TXI1,
//;0x0374 SCI1_TEI1
(fp)INT_Excep_SCI1_TEI1,
//;0x0378 SCI2_ERI2
(fp)INT_Excep_SCI2_ERI2,
//;0x037C SCI2_RXI2
(fp)INT_Excep_SCI2_RXI2,
//;0x0380 SCI2_TXI2
(fp)INT_Excep_SCI2_TXI2,
//;0x0384 SCI2_TEI2
(fp)INT_Excep_SCI2_TEI2,
//;0x0388 SCI3_ERI3
(fp)INT_Excep_SCI3_ERI3,
//;0x038C SCI3_RXI3
(fp)INT_Excep_SCI3_RXI3,
//;0x0390 SCI3_TXI3
(fp)INT_Excep_SCI3_TXI3,
//;0x0394 SCI3_TEI3
(fp)INT_Excep_SCI3_TEI3,
//;0x0398 SCI4_ERI4
(fp)INT_Excep_SCI4_ERI4,
//;0x039C SCI4_RXI4
(fp)INT_Excep_SCI4_RXI4,
//;0x03A0 SCI4_TXI4
(fp)INT_Excep_SCI4_TXI4,
//;0x03A4 SCI4_TEI4
(fp)INT_Excep_SCI4_TEI4,
//;0x03A8 SCI5_ERI5
(fp)INT_Excep_SCI5_ERI5,
//;0x03AC SCI5_RXI5
(fp)INT_Excep_SCI5_RXI5,
//;0x03B0 SCI5_TXI5
(fp)INT_Excep_SCI5_TXI5,
//;0x03B4 SCI5_TEI5
(fp)INT_Excep_SCI5_TEI5,
//;0x03B8 SCI6_ERI6
(fp)INT_Excep_SCI6_ERI6,
//;0x03BC SCI6_RXI6
(fp)INT_Excep_SCI6_RXI6,
//;0x03C0 SCI6_TXI6
(fp)INT_Excep_SCI6_TXI6,
//;0x03C4 SCI6_TEI6
(fp)INT_Excep_SCI6_TEI6,
//;0x03C8 Reserved
(fp)0,
//;0x03CC Reserved
(fp)0,
//;0x03D0 Reserved
(fp)0,
//;0x03D4 Reserved
(fp)0,
//;0x03D8 RIIC0_EEI0
(fp)INT_Excep_RIIC0_EEI0,
//;0x03DC RIIC0_RXI0
(fp)INT_Excep_RIIC0_RXI0,
//;0x03E0 RIIC0_TXI0
(fp)INT_Excep_RIIC0_TXI0,
//;0x03E4 RIIC0_TEI0
(fp)INT_Excep_RIIC0_TEI0,
//;0x03E8 RIIC1_EEI1
(fp)INT_Excep_RIIC1_EEI1,
//;0x03EC RIIC1_RXI1
(fp)INT_Excep_RIIC1_RXI1,
//;0x03F0 RIIC1_TXI1
(fp)INT_Excep_RIIC1_TXI1,
//;0x03F4 RIIC1_TEI1
(fp)INT_Excep_RIIC1_TEI1,
//;0x03F8 Reserved
(fp)0,
//;0x03FC Reserved
(fp)0,
};

@ -0,0 +1,572 @@
/*
FreeRTOS V6.0.5 - Copyright (C) 2010 Real Time Engineers Ltd.
***************************************************************************
* *
* If you are: *
* *
* + New to FreeRTOS, *
* + Wanting to learn FreeRTOS or multitasking in general quickly *
* + Looking for basic training, *
* + Wanting to improve your FreeRTOS skills and productivity *
* *
* then take a look at the FreeRTOS eBook *
* *
* "Using the FreeRTOS Real Time Kernel - a Practical Guide" *
* http://www.FreeRTOS.org/Documentation *
* *
* A pdf reference manual is also available. Both are usually delivered *
* to your inbox within 20 minutes to two hours when purchased between 8am *
* and 8pm GMT (although please allow up to 24 hours in case of *
* exceptional circumstances). Thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
***NOTE*** The exception to the GPL is included to allow you to distribute
a combined work that includes FreeRTOS without being obliged to provide the
source code for proprietary components outside of the FreeRTOS kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
1 tab == 4 spaces!
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
/* Hardware specific includes. */
#include "iodefine.h"
#include "typedefine.h"
#include "r_ether.h"
#include "phy.h"
/* FreeRTOS includes. */
#include "FreeRTOS.h"
#include "task.h"
#include "semphr.h"
/* uIP includes. */
#include "net/uip.h"
/* The time to wait between attempts to obtain a free buffer. */
#define emacBUFFER_WAIT_DELAY_ms ( 3 / portTICK_RATE_MS )
/* The number of times emacBUFFER_WAIT_DELAY_ms should be waited before giving
up on attempting to obtain a free buffer all together. */
#define emacBUFFER_WAIT_ATTEMPTS ( 30 )
/* The number of Rx descriptors. */
#define emacNUM_RX_DESCRIPTORS 8
/* The number of Tx descriptors. When using uIP there is not point in having
more than two. */
#define emacNUM_TX_BUFFERS 2
/* The total number of EMAC buffers to allocate. */
#define emacNUM_BUFFERS ( emacNUM_RX_DESCRIPTORS + emacNUM_TX_BUFFERS )
/* The time to wait for the Tx descriptor to become free. */
#define emacTX_WAIT_DELAY_ms ( 10 / portTICK_RATE_MS )
/* The total number of times to wait emacTX_WAIT_DELAY_ms for the Tx descriptor to
become free. */
#define emacTX_WAIT_ATTEMPTS ( 50 )
/* Only Rx end and Tx end interrupts are used by this driver. */
#define emacTX_END_INTERRUPT ( 1UL << 21UL )
#define emacRX_END_INTERRUPT ( 1UL << 18UL )
/*-----------------------------------------------------------*/
/* The buffers and descriptors themselves. */
static volatile ethfifo xRxDescriptors[ emacNUM_RX_DESCRIPTORS ] __attribute__((aligned(16)));
static volatile ethfifo xTxDescriptors[ emacNUM_TX_BUFFERS ] __attribute__((aligned(16)));
static char xEthernetBuffers[ emacNUM_BUFFERS ][ UIP_BUFSIZE ] __attribute__((aligned(16)));
/* Used to indicate which buffers are free and which are in use. If an index
contains 0 then the corresponding buffer in xEthernetBuffers is free, otherwise
the buffer is in use or about to be used. */
static unsigned char ucBufferInUse[ emacNUM_BUFFERS ];
/*-----------------------------------------------------------*/
/*
* Initialise both the Rx and Tx descriptors.
*/
static void prvInitialiseDescriptors( void );
/*
* Return a pointer to a free buffer within xEthernetBuffers.
*/
static unsigned char *prvGetNextBuffer( void );
/*
* Return a buffer to the list of free buffers.
*/
static void prvReturnBuffer( unsigned char *pucBuffer );
/*
* Examine the status of the next Rx FIFO to see if it contains new data.
*/
static unsigned long prvCheckRxFifoStatus( void );
/*
* Setup the microcontroller for communication with the PHY.
*/
static void prvResetMAC( void );
/*
* Configure the Ethernet interface peripherals.
*/
static void prvConfigureEtherCAndEDMAC( void );
/*
* Something has gone wrong with the descriptor usage. Reset all the buffers
* and descriptors.
*/
static void prvResetEverything( void );
/*
* Wrapper and handler for the EMAC peripheral. See the documentation for this
* port on http://www.FreeRTOS.org for more information on defining interrupt
* handlers.
*/
void vEMAC_ISR_Wrapper( void ) __attribute__((naked));
static void vEMAC_ISR_Handler( void ) __attribute__((noinline));
/*-----------------------------------------------------------*/
/* Points to the Rx descriptor currently in use. */
static ethfifo *pxCurrentRxDesc = NULL;
/* The buffer used by the uIP stack to both receive and send. This points to
one of the Ethernet buffers when its actually in use. */
unsigned char *uip_buf = NULL;
/*-----------------------------------------------------------*/
void vInitEmac( void )
{
/* Software reset. */
prvResetMAC();
/* Set the Rx and Tx descriptors into their initial state. */
prvInitialiseDescriptors();
/* Set the MAC address into the ETHERC */
ETHERC.MAHR = ( ( unsigned long ) configMAC_ADDR0 << 24UL ) |
( ( unsigned long ) configMAC_ADDR1 << 16UL ) |
( ( unsigned long ) configMAC_ADDR2 << 8UL ) |
( unsigned long ) configMAC_ADDR3;
ETHERC.MALR.BIT.MA = ( ( unsigned long ) configMAC_ADDR4 << 8UL ) |
( unsigned long ) configMAC_ADDR5;
/* Perform rest of interface hardware configuration. */
prvConfigureEtherCAndEDMAC();
/* Nothing received yet, so uip_buf points nowhere. */
uip_buf = NULL;
/* Initialize the PHY */
phy_init();
}
/*-----------------------------------------------------------*/
void vEMACWrite( void )
{
long x;
/* Wait until the second transmission of the last packet has completed. */
for( x = 0; x < emacTX_WAIT_ATTEMPTS; x++ )
{
if( ( xTxDescriptors[ 1 ].status & ACT ) != 0 )
{
/* Descriptor is still active. */
vTaskDelay( emacTX_WAIT_DELAY_ms );
}
else
{
break;
}
}
/* Is the descriptor free after waiting for it? */
if( ( xTxDescriptors[ 1 ].status & ACT ) != 0 )
{
/* Something has gone wrong. */
prvResetEverything();
}
/* Setup both descriptors to transmit the frame. */
xTxDescriptors[ 0 ].buf_p = ( char * ) uip_buf;
xTxDescriptors[ 0 ].bufsize = uip_len;
xTxDescriptors[ 1 ].buf_p = ( char * ) uip_buf;
xTxDescriptors[ 1 ].bufsize = uip_len;
/* uip_buf is being sent by the Tx descriptor. Allocate a new buffer
for use by the stack. */
uip_buf = prvGetNextBuffer();
/* Clear previous settings and go. */
xTxDescriptors[0].status &= ~( FP1 | FP0 );
xTxDescriptors[0].status |= ( FP1 | FP0 | ACT );
xTxDescriptors[1].status &= ~( FP1 | FP0 );
xTxDescriptors[1].status |= ( FP1 | FP0 | ACT );
EDMAC.EDTRR.LONG = 0x00000001;
}
/*-----------------------------------------------------------*/
unsigned long ulEMACRead( void )
{
unsigned long ulBytesReceived;
ulBytesReceived = prvCheckRxFifoStatus();
if( ulBytesReceived > 0 )
{
pxCurrentRxDesc->status &= ~( FP1 | FP0 );
pxCurrentRxDesc->status |= ACT;
if( EDMAC.EDRRR.LONG == 0x00000000L )
{
/* Restart Ethernet if it has stopped */
EDMAC.EDRRR.LONG = 0x00000001L;
}
/* Mark the pxDescriptor buffer as free as uip_buf is going to be set to
the buffer that contains the received data. */
prvReturnBuffer( uip_buf );
uip_buf = ( void * ) pxCurrentRxDesc->buf_p;
/* Move onto the next buffer in the ring. */
pxCurrentRxDesc = pxCurrentRxDesc->next;
}
return ulBytesReceived;
}
/*-----------------------------------------------------------*/
long lEMACWaitForLink( void )
{
long lReturn;
/* Set the link status. */
switch( phy_set_autonegotiate() )
{
/* Half duplex link */
case PHY_LINK_100H:
ETHERC.ECMR.BIT.DM = 0;
ETHERC.ECMR.BIT.RTM = 1;
lReturn = pdPASS;
break;
case PHY_LINK_10H:
ETHERC.ECMR.BIT.DM = 0;
ETHERC.ECMR.BIT.RTM = 0;
lReturn = pdPASS;
break;
/* Full duplex link */
case PHY_LINK_100F:
ETHERC.ECMR.BIT.DM = 1;
ETHERC.ECMR.BIT.RTM = 1;
lReturn = pdPASS;
break;
case PHY_LINK_10F:
ETHERC.ECMR.BIT.DM = 1;
ETHERC.ECMR.BIT.RTM = 0;
lReturn = pdPASS;
break;
default:
lReturn = pdFAIL;
break;
}
if( lReturn == pdPASS )
{
/* Enable receive and transmit. */
ETHERC.ECMR.BIT.RE = 1;
ETHERC.ECMR.BIT.TE = 1;
/* Enable EDMAC receive */
EDMAC.EDRRR.LONG = 0x1;
}
return lReturn;
}
/*-----------------------------------------------------------*/
static void prvInitialiseDescriptors( void )
{
volatile ethfifo *pxDescriptor;
long x;
for( x = 0; x < emacNUM_BUFFERS; x++ )
{
/* Ensure none of the buffers are shown as in use at the start. */
ucBufferInUse[ x ] = pdFALSE;
}
/* Initialise the Rx descriptors. */
for( x = 0; x < emacNUM_RX_DESCRIPTORS; x++ )
{
pxDescriptor = &( xRxDescriptors[ x ] );
pxDescriptor->buf_p = &( xEthernetBuffers[ x ][ 0 ] );
pxDescriptor->bufsize = UIP_BUFSIZE;
pxDescriptor->size = 0;
pxDescriptor->status = ACT;
pxDescriptor->next = ( struct Descriptor * ) &xRxDescriptors[ x + 1 ];
/* Mark this buffer as in use. */
ucBufferInUse[ x ] = pdTRUE;
}
/* The last descriptor points back to the start. */
pxDescriptor->status |= DL;
pxDescriptor->next = ( struct Descriptor * ) &xRxDescriptors[ 0 ];
/* Initialise the Tx descriptors. */
for( x = 0; x < emacNUM_TX_BUFFERS; x++ )
{
pxDescriptor = &( xTxDescriptors[ x ] );
/* A buffer is not allocated to the Tx descriptor until a send is
actually required. */
pxDescriptor->buf_p = NULL;
pxDescriptor->bufsize = UIP_BUFSIZE;
pxDescriptor->size = 0;
pxDescriptor->status = 0;
pxDescriptor->next = ( struct Descriptor * ) &xTxDescriptors[ x + 1 ];
}
/* The last descriptor points back to the start. */
pxDescriptor->status |= DL;
pxDescriptor->next = ( struct Descriptor * ) &( xTxDescriptors[ 0 ] );
/* Use the first Rx descriptor to start with. */
pxCurrentRxDesc = ( struct Descriptor * ) &( xRxDescriptors[ 0 ] );
}
/*-----------------------------------------------------------*/
static unsigned char *prvGetNextBuffer( void )
{
long x;
unsigned char *pucReturn = NULL;
unsigned long ulAttempts = 0;
while( pucReturn == NULL )
{
/* Look through the buffers to find one that is not in use by
anything else. */
for( x = 0; x < emacNUM_BUFFERS; x++ )
{
if( ucBufferInUse[ x ] == pdFALSE )
{
ucBufferInUse[ x ] = pdTRUE;
pucReturn = ( unsigned char * ) &( xEthernetBuffers[ x ][ 0 ] );
break;
}
}
/* Was a buffer found? */
if( pucReturn == NULL )
{
ulAttempts++;
if( ulAttempts >= emacBUFFER_WAIT_ATTEMPTS )
{
break;
}
/* Wait then look again. */
vTaskDelay( emacBUFFER_WAIT_DELAY_ms );
}
}
return pucReturn;
}
/*-----------------------------------------------------------*/
static void prvReturnBuffer( unsigned char *pucBuffer )
{
unsigned long ul;
/* Return a buffer to the pool of free buffers. */
for( ul = 0; ul < emacNUM_BUFFERS; ul++ )
{
if( &( xEthernetBuffers[ ul ][ 0 ] ) == ( void * ) pucBuffer )
{
ucBufferInUse[ ul ] = pdFALSE;
break;
}
}
}
/*-----------------------------------------------------------*/
static void prvResetEverything( void )
{
/* Temporary code just to see if this gets called. This function has not
been implemented. */
portDISABLE_INTERRUPTS();
for( ;; );
}
/*-----------------------------------------------------------*/
static unsigned long prvCheckRxFifoStatus( void )
{
unsigned long ulReturn = 0;
if( ( pxCurrentRxDesc->status & ACT ) != 0 )
{
/* Current descriptor is still active. */
}
else if( ( pxCurrentRxDesc->status & FE ) != 0 )
{
/* Frame error. Clear the error. */
pxCurrentRxDesc->status &= ~( FP1 | FP0 | FE );
pxCurrentRxDesc->status &= ~( RMAF | RRF | RTLF | RTSF | PRE | CERF );
pxCurrentRxDesc->status |= ACT;
pxCurrentRxDesc = pxCurrentRxDesc->next;
if( EDMAC.EDRRR.LONG == 0x00000000UL )
{
/* Restart Ethernet if it has stopped. */
EDMAC.EDRRR.LONG = 0x00000001UL;
}
}
else
{
/* The descriptor contains a frame. Because of the size of the buffers
the frame should always be complete. */
if( ( pxCurrentRxDesc->status & FP0 ) == FP0 )
{
ulReturn = pxCurrentRxDesc->size;
}
else
{
/* Do not expect to get here. */
prvResetEverything();
}
}
return ulReturn;
}
/*-----------------------------------------------------------*/
static void prvResetMAC( void )
{
/* Ensure the EtherC and EDMAC are enabled. */
SYSTEM.MSTPCRB.BIT.MSTPB15 = 0;
vTaskDelay( 100 / portTICK_RATE_MS );
EDMAC.EDMR.BIT.SWR = 1;
/* Crude wait for reset to complete. */
vTaskDelay( 500 / portTICK_RATE_MS );
}
/*-----------------------------------------------------------*/
static void prvConfigureEtherCAndEDMAC( void )
{
/* Initialisation code taken from Renesas example project. */
/* TODO: Check bit 5 */
ETHERC.ECSR.LONG = 0x00000037; /* Clear all ETHERC statuS BFR, PSRTO, LCHNG, MPD, ICD */
/* Set the EDMAC interrupt priority. */
_IPR( _ETHER_EINT ) = configKERNEL_INTERRUPT_PRIORITY;
/* TODO: Check bit 5 */
/* Enable interrupts of interest only. */
EDMAC.EESIPR.LONG = emacTX_END_INTERRUPT | emacRX_END_INTERRUPT;
ETHERC.RFLR.LONG = 1518; /* Ether payload is 1500+ CRC */
ETHERC.IPGR.LONG = 0x00000014; /* Intergap is 96-bit time */
/* EDMAC */
EDMAC.EESR.LONG = 0x47FF0F9F; /* Clear all ETHERC and EDMAC status bits */
#ifdef __RX_LITTLE_ENDIAN__
EDMAC.EDMR.BIT.DE = 1;
#endif
EDMAC.RDLAR = ( void * ) pxCurrentRxDesc; /* Initialaize Rx Descriptor List Address */
EDMAC.TDLAR = ( void * ) &( xTxDescriptors[ 0 ] ); /* Initialaize Tx Descriptor List Address */
EDMAC.TRSCER.LONG = 0x00000000; /* Copy-back status is RFE & TFE only */
EDMAC.TFTR.LONG = 0x00000000; /* Threshold of Tx_FIFO */
EDMAC.FDR.LONG = 0x00000000; /* Transmit fifo & receive fifo is 256 bytes */
EDMAC.RMCR.LONG = 0x00000003; /* Receive function is normal mode(continued) */
/* Enable the interrupt... */
_IEN( _ETHER_EINT ) = 1;
}
/*-----------------------------------------------------------*/
void vEMAC_ISR_Wrapper( void )
{
/* This is a naked function. See the documentation for this port on
http://www.FreeRTOS.org for more information on writing interrupts.
/* Save the registers and enable interrupts. */
portENTER_INTERRUPT();
/* Perform the actual EMAC processing. */
vEMAC_ISR_Handler();
/* Restore the registers and return. */
portEXIT_INTERRUPT();
}
/*-----------------------------------------------------------*/
static void vEMAC_ISR_Handler( void )
{
unsigned long ul = EDMAC.EESR.LONG;
long lHigherPriorityTaskWoken = pdFALSE;
extern xSemaphoreHandle xEMACSemaphore;
static long ulTxEndInts = 0;
/* Has a Tx end occurred? */
if( ul & emacTX_END_INTERRUPT )
{
++ulTxEndInts;
if( ulTxEndInts >= 2 )
{
/* Only return the buffer to the pool once both Txes have completed. */
prvReturnBuffer( ( void * ) xTxDescriptors[ 0 ].buf_p );
ulTxEndInts = 0;
}
EDMAC.EESR.LONG = emacTX_END_INTERRUPT;
}
/* Has an Rx end occurred? */
if( ul & emacRX_END_INTERRUPT )
{
/* Make sure the Ethernet task is not blocked waiting for a packet. */
xSemaphoreGiveFromISR( xEMACSemaphore, &lHigherPriorityTaskWoken );
portYIELD_FROM_ISR( lHigherPriorityTaskWoken );
EDMAC.EESR.LONG = emacRX_END_INTERRUPT;
}
}

@ -0,0 +1,277 @@
/**
* \addtogroup httpd
* @{
*/
/**
* \file
* Web server script interface
* \author
* Adam Dunkels <adam@sics.se>
*
*/
/*
* Copyright (c) 2001-2006, Adam Dunkels.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote
* products derived from this software without specific prior
* written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* This file is part of the uIP TCP/IP stack.
*
* $Id: httpd-cgi.c,v 1.2 2006/06/11 21:46:37 adam Exp $
*
*/
#include "net/uip.h"
#include "net/psock.h"
#include "apps/httpd/httpd.h"
#include "apps/httpd/httpd-cgi.h"
#include "apps/httpd/httpd-fs.h"
#include <stdio.h>
#include <string.h>
#include "FreeRTOS.h"
#include "task.h"
HTTPD_CGI_CALL( file, "file-stats", file_stats );
HTTPD_CGI_CALL( tcp, "tcp-connections", tcp_stats );
HTTPD_CGI_CALL( net, "net-stats", net_stats );
HTTPD_CGI_CALL( rtos, "rtos-stats", rtos_stats );
HTTPD_CGI_CALL( run, "run-time", run_time );
HTTPD_CGI_CALL( io, "led-io", led_io );
static const struct httpd_cgi_call *calls[] = { &file, &tcp, &net, &rtos, &run, &io, NULL };
/*---------------------------------------------------------------------------*/
static PT_THREAD( nullfunction ( struct httpd_state *s, char *ptr ) )
{
PSOCK_BEGIN( &s->sout );
( void ) ptr;
( void ) PT_YIELD_FLAG;
PSOCK_END( &s->sout );
}
/*---------------------------------------------------------------------------*/
httpd_cgifunction httpd_cgi( char *name )
{
const struct httpd_cgi_call **f;
/* Find the matching name in the table, return the function. */
for( f = calls; *f != NULL; ++f )
{
if( strncmp((*f)->name, name, strlen((*f)->name)) == 0 )
{
return( *f )->function;
}
}
return nullfunction;
}
/*---------------------------------------------------------------------------*/
static unsigned short generate_file_stats( void *arg )
{
char *f = ( char * ) arg;
return sprintf( ( char * ) uip_appdata, "%5u", httpd_fs_count(f) );
}
/*---------------------------------------------------------------------------*/
static PT_THREAD( file_stats ( struct httpd_state *s, char *ptr ) )
{
PSOCK_BEGIN( &s->sout );
( void ) PT_YIELD_FLAG;
PSOCK_GENERATOR_SEND( &s->sout, generate_file_stats, strchr(ptr, ' ') + 1 );
PSOCK_END( &s->sout );
}
/*---------------------------------------------------------------------------*/
static const char closed[] = /* "CLOSED",*/ { 0x43, 0x4c, 0x4f, 0x53, 0x45, 0x44, 0 };
static const char syn_rcvd[] = /* "SYN-RCVD",*/ { 0x53, 0x59, 0x4e, 0x2d, 0x52, 0x43, 0x56, 0x44, 0 };
static const char syn_sent[] = /* "SYN-SENT",*/ { 0x53, 0x59, 0x4e, 0x2d, 0x53, 0x45, 0x4e, 0x54, 0 };
static const char established[] = /* "ESTABLISHED",*/ { 0x45, 0x53, 0x54, 0x41, 0x42, 0x4c, 0x49, 0x53, 0x48, 0x45, 0x44, 0 };
static const char fin_wait_1[] = /* "FIN-WAIT-1",*/ { 0x46, 0x49, 0x4e, 0x2d, 0x57, 0x41, 0x49, 0x54, 0x2d, 0x31, 0 };
static const char fin_wait_2[] = /* "FIN-WAIT-2",*/ { 0x46, 0x49, 0x4e, 0x2d, 0x57, 0x41, 0x49, 0x54, 0x2d, 0x32, 0 };
static const char closing[] = /* "CLOSING",*/ { 0x43, 0x4c, 0x4f, 0x53, 0x49, 0x4e, 0x47, 0 };
static const char time_wait[] = /* "TIME-WAIT,"*/ { 0x54, 0x49, 0x4d, 0x45, 0x2d, 0x57, 0x41, 0x49, 0x54, 0 };
static const char last_ack[] = /* "LAST-ACK"*/ { 0x4c, 0x41, 0x53, 0x54, 0x2d, 0x41, 0x43, 0x4b, 0 };
static const char *states[] = { closed, syn_rcvd, syn_sent, established, fin_wait_1, fin_wait_2, closing, time_wait, last_ack };
static unsigned short generate_tcp_stats( void *arg )
{
struct uip_conn *conn;
struct httpd_state *s = ( struct httpd_state * ) arg;
conn = &uip_conns[s->count];
return sprintf( ( char * ) uip_appdata,
"<tr><td>%d</td><td>%u.%u.%u.%u:%u</td><td>%s</td><td>%u</td><td>%u</td><td>%c %c</td></tr>\r\n", htons(conn->lport),
htons(conn->ripaddr.u16[0]) >> 8, htons(conn->ripaddr.u16[0]) & 0xff, htons(conn->ripaddr.u16[1]) >> 8,
htons(conn->ripaddr.u16[1]) & 0xff, htons(conn->rport), states[conn->tcpstateflags & UIP_TS_MASK], conn->nrtx, conn->timer,
(uip_outstanding(conn)) ? '*' : ' ', (uip_stopped(conn)) ? '!' : ' ' );
}
/*---------------------------------------------------------------------------*/
static PT_THREAD( tcp_stats ( struct httpd_state *s, char *ptr ) )
{
PSOCK_BEGIN( &s->sout );
( void ) ptr;
( void ) PT_YIELD_FLAG;
for( s->count = 0; s->count < UIP_CONNS; ++s->count )
{
if( (uip_conns[s->count].tcpstateflags & UIP_TS_MASK) != UIP_CLOSED )
{
PSOCK_GENERATOR_SEND( &s->sout, generate_tcp_stats, s );
}
}
PSOCK_END( &s->sout );
}
/*---------------------------------------------------------------------------*/
static unsigned short generate_net_stats( void *arg )
{
struct httpd_state *s = ( struct httpd_state * ) arg;
return sprintf( ( char * ) uip_appdata, "%5u\n", (( uip_stats_t * ) &uip_stat)[s->count] );
}
static PT_THREAD( net_stats ( struct httpd_state *s, char *ptr ) )
{
PSOCK_BEGIN( &s->sout );
( void ) ptr;
( void ) PT_YIELD_FLAG;
#if UIP_STATISTICS
for( s->count = 0; s->count < sizeof(uip_stat) / sizeof(uip_stats_t); ++s->count )
{
PSOCK_GENERATOR_SEND( &s->sout, generate_net_stats, s );
}
#endif /* UIP_STATISTICS */
PSOCK_END( &s->sout );
}
/*---------------------------------------------------------------------------*/
extern void vTaskList( signed char *pcWriteBuffer );
extern char *pcGetTaskStatusMessage( void );
static char cCountBuf[128];
long lRefreshCount = 0;
static unsigned short generate_rtos_stats( void *arg )
{
( void ) arg;
lRefreshCount++;
sprintf( cCountBuf, "<p><br>Refresh count = %d<p><br>%s", ( int ) lRefreshCount, pcGetTaskStatusMessage() );
vTaskList( uip_appdata );
strcat( uip_appdata, cCountBuf );
return strlen( uip_appdata );
}
/*---------------------------------------------------------------------------*/
static PT_THREAD( rtos_stats ( struct httpd_state *s, char *ptr ) )
{
PSOCK_BEGIN( &s->sout );
( void ) ptr;
( void ) PT_YIELD_FLAG;
PSOCK_GENERATOR_SEND( &s->sout, generate_rtos_stats, NULL );
PSOCK_END( &s->sout );
}
/*---------------------------------------------------------------------------*/
char *pcStatus;
unsigned long ulString;
static unsigned short generate_io_state( void *arg )
{
extern long lParTestGetLEDState( unsigned long ulLED );
( void ) arg;
/* Are the dynamically setable LEDs currently on or off? */
if( lParTestGetLEDState( 8 ) )
{
pcStatus = "checked";
}
else
{
pcStatus = "";
}
sprintf( uip_appdata, "<input type=\"checkbox\" name=\"LED0\" value=\"1\" %s>LED<p><p>", pcStatus );
return strlen( uip_appdata );
}
/*---------------------------------------------------------------------------*/
extern void vTaskGetRunTimeStats( signed char *pcWriteBuffer );
extern unsigned short usMaxJitter;
static char cJitterBuffer[ 200 ];
static unsigned short generate_runtime_stats( void *arg )
{
( void ) arg;
lRefreshCount++;
sprintf( cCountBuf, "<p><br>Refresh count = %d", ( int ) lRefreshCount );
#ifdef INCLUDE_HIGH_FREQUENCY_TIMER_TEST
{
sprintf( cJitterBuffer, "<p><br>Max high frequency timer jitter = %d peripheral clock periods.<p><br>", ( int ) usMaxJitter );
vTaskGetRunTimeStats( uip_appdata );
strcat( uip_appdata, cJitterBuffer );
}
#else
{
( void ) cJitterBuffer;
strcpy( uip_appdata, "<p>Run time stats are only available in the debug_with_optimisation build configuration.<p>" );
}
#endif
strcat( uip_appdata, cCountBuf );
return strlen( uip_appdata );
}
/*---------------------------------------------------------------------------*/
static PT_THREAD( run_time ( struct httpd_state *s, char *ptr ) )
{
PSOCK_BEGIN( &s->sout );
( void ) ptr;
( void ) PT_YIELD_FLAG;
PSOCK_GENERATOR_SEND( &s->sout, generate_runtime_stats, NULL );
PSOCK_END( &s->sout );
}
/*---------------------------------------------------------------------------*/
static PT_THREAD( led_io ( struct httpd_state *s, char *ptr ) )
{
PSOCK_BEGIN( &s->sout );
( void ) ptr;
( void ) PT_YIELD_FLAG;
PSOCK_GENERATOR_SEND( &s->sout, generate_io_state, NULL );
PSOCK_END( &s->sout );
}
/** @} */

@ -0,0 +1,8 @@
<html>
<body bgcolor="white">
<center>
<h1>404 - file not found</h1>
<h3>Go <a href="/">here</a> instead.</h3>
</center>
</body>
</html>

@ -0,0 +1,13 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html>
<head>
<title>FreeRTOS.org uIP WEB server demo</title>
</head>
<BODY onLoad="window.setTimeout(&quot;location.href='index.shtml'&quot;,100)">
<font face="arial">
Loading index.shtml. Click <a href="index.shtml">here</a> if not automatically redirected.
</font>
</font>
</body>
</html>

@ -0,0 +1,20 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html>
<head>
<title>FreeRTOS.org uIP WEB server demo</title>
</head>
<BODY onLoad="window.setTimeout(&quot;location.href='index.shtml'&quot;,2000)">
<font face="arial">
<a href="index.shtml">Task Stats</a> <b>|</b> <a href="runtime.shtml">Run Time Stats</a> <b>|</b> <a href="stats.shtml">TCP Stats</a> <b>|</b> <a href="tcp.shtml">Connections</a> <b>|</b> <a href="http://www.freertos.org/">FreeRTOS Homepage</a> <b>|</b> <a href="io.shtml">IO</a> <b>|</b> <a href="logo.jpg">37K jpg</a>
<br><p>
<hr>
<br><p>
<h2>Task statistics</h2>
Page will refresh every 2 seconds.<p>
<font face="courier"><pre>Task State Priority Stack #<br>************************************************<br>
%! rtos-stats
</pre></font>
</font>
</body>
</html>

@ -0,0 +1,28 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html>
<head>
<title>FreeRTOS.org uIP WEB server demo</title>
</head>
<BODY>
<font face="arial">
<a href="index.shtml">Task Stats</a> <b>|</b> <a href="runtime.shtml">Run Time Stats</a> <b>|</b> <a href="stats.shtml">TCP Stats</a> <b>|</b> <a href="tcp.shtml">Connections</a> <b>|</b> <a href="http://www.freertos.org/">FreeRTOS Homepage</a> <b>|</b> <a href="io.shtml">IO</a> <b>|</b> <a href="logo.jpg">37K jpg</a>
<br><p>
<hr>
<b>LED and LCD IO</b><br>
<p>
Use the check box to turn on or off LED 4, then click "Update IO".
<p>
<form name="aForm" action="/io.shtml" method="get">
%! led-io
<p>
<input type="submit" value="Update IO">
</form>
<br><p>
</font>
</body>
</html>

Binary file not shown.

After

Width:  |  Height:  |  Size: 32 KiB

@ -0,0 +1,20 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html>
<head>
<title>FreeRTOS.org uIP WEB server demo</title>
</head>
<BODY onLoad="window.setTimeout(&quot;location.href='runtime.shtml'&quot;,2000)">
<font face="arial">
<a href="index.shtml">Task Stats</a> <b>|</b> <a href="runtime.shtml">Run Time Stats</a> <b>|</b> <a href="stats.shtml">TCP Stats</a> <b>|</b> <a href="tcp.shtml">Connections</a> <b>|</b> <a href="http://www.freertos.org/">FreeRTOS Homepage</a> <b>|</b> <a href="io.shtml">IO</a> <b>|</b> <a href="logo.jpg">37K jpg</a>
<br><p>
<hr>
<br><p>
<h2>Run-time statistics</h2>
Page will refresh every 2 seconds.<p>
<font face="courier"><pre>Task Abs Time % Time<br>****************************************<br>
%! run-time
</pre></font>
</font>
</body>
</html>

@ -0,0 +1,47 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html>
<head>
<title>FreeRTOS.org uIP WEB server demo</title>
</head>
<BODY>
<font face="arial">
<a href="index.shtml">Task Stats</a> <b>|</b> <a href="runtime.shtml">Run Time Stats</a> <b>|</b> <a href="stats.shtml">TCP Stats</a> <b>|</b> <a href="tcp.shtml">Connections</a> <b>|</b> <a href="http://www.freertos.org/">FreeRTOS Homepage</a> <b>|</b> <a href="io.shtml">IO</a> <b>|</b> <a href="logo.jpg">37K jpg</a>
<br><p>
<hr>
<br><p>
<h2>Network statistics</h2>
<table width="300" border="0">
<tr><td align="left"><font face="courier"><pre>
IP Packets received
Packets sent
Forwaded
Dropped
IP errors IP version/header length
IP length, high byte
IP length, low byte
IP fragments
Header checksum
Wrong protocol
ICMP Packets received
Packets sent
Packets dropped
Type errors
Checksum errors
TCP Packets received
Packets sent
Packets dropped
Checksum errors
Data packets without ACKs
Resets
Retransmissionsa
Syn to closed port
UDP Packets dropped
Packets received
Packets sent
Packets chkerr
No connection avaliable
</pre></font></td><td><font face="courier"><pre>%! net-stats
</pre></font></td></table>
</font>
</body>
</html>

@ -0,0 +1,21 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html>
<head>
<title>FreeRTOS.org uIP WEB server demo</title>
</head>
<BODY>
<font face="arial">
<a href="index.shtml">Task Stats</a> <b>|</b> <a href="runtime.shtml">Run Time Stats</a> <b>|</b> <a href="stats.shtml">TCP Stats</a> <b>|</b> <a href="tcp.shtml">Connections</a> <b>|</b> <a href="http://www.freertos.org/">FreeRTOS Homepage</a> <b>|</b> <a href="io.shtml">IO</a> <b>|</b> <a href="logo.jpg">37K jpg</a>
<br><p>
<hr>
<br>
<h2>Network connections</h2>
<p>
<table>
<tr><th>Local</th><th>Remote</th><th>State</th><th>Retransmissions</th><th>Timer</th><th>Flags</th></tr>
%! tcp-connections
</pre></font>
</font>
</body>
</html>

File diff suppressed because it is too large Load Diff

@ -0,0 +1,79 @@
#!/usr/bin/perl
open(OUTPUT, "> httpd-fsdata.c");
chdir("httpd-fs");
opendir(DIR, ".");
@files = grep { !/^\./ && !/(CVS|~)/ } readdir(DIR);
closedir(DIR);
foreach $file (@files) {
if(-d $file && $file !~ /^\./) {
print "Processing directory $file\n";
opendir(DIR, $file);
@newfiles = grep { !/^\./ && !/(CVS|~)/ } readdir(DIR);
closedir(DIR);
printf "Adding files @newfiles\n";
@files = (@files, map { $_ = "$file/$_" } @newfiles);
next;
}
}
foreach $file (@files) {
if(-f $file) {
print "Adding file $file\n";
open(FILE, $file) || die "Could not open file $file\n";
binmode FILE;
$file =~ s-^-/-;
$fvar = $file;
$fvar =~ s-/-_-g;
$fvar =~ s-\.-_-g;
# for AVR, add PROGMEM here
print(OUTPUT "static const char data".$fvar."[] = {\n");
print(OUTPUT "\t/* $file */\n\t");
for($j = 0; $j < length($file); $j++) {
printf(OUTPUT "%#02x, ", unpack("C", substr($file, $j, 1)));
}
printf(OUTPUT "0,\n");
$i = 0;
while(read(FILE, $data, 1)) {
if($i == 0) {
print(OUTPUT "\t");
}
printf(OUTPUT "%#02x, ", unpack("C", $data));
$i++;
if($i == 10) {
print(OUTPUT "\n");
$i = 0;
}
}
print(OUTPUT "0};\n\n");
close(FILE);
push(@fvars, $fvar);
push(@pfiles, $file);
}
}
for($i = 0; $i < @fvars; $i++) {
$file = $pfiles[$i];
$fvar = $fvars[$i];
if($i == 0) {
$prevfile = "NULL";
} else {
$prevfile = "file" . $fvars[$i - 1];
}
print(OUTPUT "const struct httpd_fsdata_file file".$fvar."[] = {{$prevfile, data$fvar, ");
print(OUTPUT "data$fvar + ". (length($file) + 1) .", ");
print(OUTPUT "sizeof(data$fvar) - ". (length($file) + 1) ."}};\n\n");
}
print(OUTPUT "#define HTTPD_FS_ROOT file$fvars[$i - 1]\n\n");
print(OUTPUT "#define HTTPD_FS_NUMFILES $i\n");

@ -0,0 +1,474 @@
/******************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Technology Corp. and is only
* intended for use with Renesas products. No other uses are authorized.
* This software is owned by Renesas Technology Corp. and is protected under
* all applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES
* REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY,
* INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
* PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY
* DISCLAIMED.
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
* TECHNOLOGY CORP. NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES
* FOR ANY REASON RELATED TO THE THIS SOFTWARE, EVEN IF RENESAS OR ITS
* AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this
* software and to discontinue the availability of this software.
* By using this software, you agree to the additional terms and
* conditions found by accessing the following link:
* http://www.renesas.com/disclaimer
******************************************************************************
* Copyright (C) 2008. Renesas Technology Corp., All Rights Reserved.
*******************************************************************************
* File Name : phy.c
* Version : 1.01
* Description : Ethernet PHY device driver
******************************************************************************
* History : DD.MM.YYYY Version Description
* : 15.02.2010 1.00 First Release
* : 06.04.2010 1.01 RX62N changes
******************************************************************************/
/******************************************************************************
Includes <System Includes> , "Project Includes"
******************************************************************************/
#include <iorx62n.h>
#include "r_ether.h"
#include "phy.h"
#include "FreeRTOS.h"
#include "task.h"
/******************************************************************************
Typedef definitions
******************************************************************************/
/******************************************************************************
Macro definitions
******************************************************************************/
/******************************************************************************
Imported global variables and functions (from other files)
******************************************************************************/
/******************************************************************************
Exported global variables and functions (to be accessed by other files)
******************************************************************************/
/******************************************************************************
Private global variables and functions
******************************************************************************/
uint16_t _phy_read( uint16_t reg_addr );
void _phy_write( uint16_t reg_addr, uint16_t data );
void _phy_preamble( void );
void _phy_reg_set( uint16_t reg_addr, int32_t option );
void _phy_reg_read( uint16_t *data );
void _phy_reg_write( uint16_t data );
void _phy_ta_z0( void );
void _phy_ta_10( void );
void _phy_mii_write_1( void );
void _phy_mii_write_0( void );
/**
* External functions
*/
/******************************************************************************
* Function Name: phy_init
* Description : Resets Ethernet PHY device
* Arguments : none
* Return Value : none
******************************************************************************/
int16_t phy_init( void )
{
uint16_t reg;
uint32_t count;
/* Reset PHY */
_phy_write(BASIC_MODE_CONTROL_REG, 0x8000);
count = 0;
do
{
vTaskDelay( 2 / portTICK_RATE_MS );
reg = _phy_read(BASIC_MODE_CONTROL_REG);
count++;
} while (reg & 0x8000 && count < PHY_RESET_WAIT);
if( count < PHY_RESET_WAIT )
{
return R_PHY_OK;
}
return R_PHY_ERROR;
}
/******************************************************************************
* Function Name: phy_set_100full
* Description : Set Ethernet PHY device to 100 Mbps full duplex
* Arguments : none
* Return Value : none
******************************************************************************/
void phy_set_100full( void )
{
_phy_write(BASIC_MODE_CONTROL_REG, 0x2100);
}
/******************************************************************************
* Function Name: phy_set_10half
* Description : Sets Ethernet PHY device to 10 Mbps half duplexR
* Arguments : none
* Return Value : none
******************************************************************************/
void phy_set_10half( void )
{
_phy_write(BASIC_MODE_CONTROL_REG, 0x0000);
}
/******************************************************************************
* Function Name: phy_set_autonegotiate
* Description : Starts autonegotiate and reports the other side's
* : physical capability
* Arguments : none
* Return Value : bit 8 - Full duplex 100 mbps
* : bit 7 - Half duplex 100 mbps
* : bit 6 - Full duplex 10 mbps
* : bit 5 - Half duplex 10 mbps
* : bit 4:0 - Always set to 00001 (IEEE 802.3)
* : -1 if error
******************************************************************************/
int16_t phy_set_autonegotiate( void )
{
uint16_t reg;
uint32_t count;
_phy_write(AN_ADVERTISEMENT_REG, 0x01E1);
_phy_write(BASIC_MODE_CONTROL_REG, 0x1200);
count = 0;
do
{
reg = _phy_read(BASIC_MODE_STATUS_REG);
count++;
vTaskDelay( 100 / portTICK_RATE_MS );
/* Make sure we don't break out if reg just contains 0xffff. */
if( reg == 0xffff )
{
reg = 0;
}
} while (!(reg & 0x0020) && (count < PHY_AUTO_NEGOTIATON_WAIT));
if (count >= PHY_AUTO_NEGOTIATON_WAIT)
{
return R_PHY_ERROR;
}
else
{
/* National DP83640 fix */
_phy_write(0x13, 0x0006);
reg = _phy_read(0x14);
_phy_write(0x14, (reg&0x7FFF));
_phy_write(0x13, 0x0000);
/* Get the link partner response */
reg = (int16_t)_phy_read(AN_LINK_PARTNER_ABILITY_REG);
if (reg & ( 1 << 8 ) )
{
return PHY_LINK_100F;
}
if (reg & ( 1 << 7 ) )
{
return PHY_LINK_100H;
}
if (reg & ( 1 << 6 ) )
{
return PHY_LINK_10F;
}
if (reg & 1 << 5 )
{
return PHY_LINK_10H;
}
return (-1);
}
}
/**
* Internal functions
*/
/******************************************************************************
* Function Name: _phy_read
* Description : Reads a PHY register
* Arguments : reg_addr - address of the PHY register
* Return Value : read value
******************************************************************************/
uint16_t _phy_read( uint16_t reg_addr )
{
uint16_t data;
_phy_preamble();
_phy_reg_set( reg_addr, PHY_READ );
_phy_ta_z0();
_phy_reg_read( &data );
_phy_ta_z0();
return( data );
}
/******************************************************************************
* Function Name: _phy_write
* Description : Writes to a PHY register
* Arguments : reg_addr - address of the PHY register
* : data - value
* Return Value : none
******************************************************************************/
void _phy_write( uint16_t reg_addr, uint16_t data )
{
_phy_preamble();
_phy_reg_set( reg_addr, PHY_WRITE );
_phy_ta_10();
_phy_reg_write( data );
_phy_ta_z0();
}
/******************************************************************************
* Function Name: _phy_preamble
* Description : As preliminary preparation for access to the PHY module register,
* "1" is output via the MII management interface.
* Arguments : none
* Return Value : none
******************************************************************************/
void _phy_preamble( void )
{
int16_t i;
i = 32;
while( i > 0 )
{
_phy_mii_write_1();
i--;
}
}
/******************************************************************************
* Function Name: _phy_reg_set
* Description : Sets a PHY device to read or write mode
* Arguments : reg_addr - address of the PHY register
* : option - mode
* Return Value : none
******************************************************************************/
void _phy_reg_set( uint16_t reg_addr, int32_t option )
{
int32_t i;
uint16_t data;
data = 0;
data = (PHY_ST << 14); /* ST code */
if( option == PHY_READ )
{
data |= (PHY_READ << 12); /* OP code(RD) */
}
else
{
data |= (PHY_WRITE << 12); /* OP code(WT) */
}
data |= (PHY_ADDR << 7); /* PHY Address */
data |= (reg_addr << 2); /* Reg Address */
i = 14;
while( i > 0 )
{
if( (data & 0x8000) == 0 )
{
_phy_mii_write_0();
}
else
{
_phy_mii_write_1();
}
data <<= 1;
i--;
}
}
/******************************************************************************
* Function Name: _phy_reg_read
* Description : Reads PHY register through MII interface
* Arguments : data - pointer to store the data read
* Return Value : none
******************************************************************************/
void _phy_reg_read( uint16_t *data )
{
int32_t i, j;
uint16_t reg_data;
reg_data = 0;
i = 16;
while( i > 0 )
{
for(j = MDC_WAIT; j > 0; j--)
{
ETHERC.PIR.LONG = 0x00000000;
}
for(j = MDC_WAIT; j > 0; j--)
{
ETHERC.PIR.LONG = 0x00000001;
}
reg_data <<= 1;
reg_data |= (uint16_t)((ETHERC.PIR.LONG & 0x00000008) >> 3); /* MDI read */
for(j = MDC_WAIT; j > 0; j--)
{
ETHERC.PIR.LONG = 0x00000001;
}
for(j = MDC_WAIT; j > 0; j--)
{
ETHERC.PIR.LONG = 0x00000000;
}
i--;
}
*data = reg_data;
}
/******************************************************************************
* Function Name: _phy_reg_write
* Description : Writes to PHY register through MII interface
* Arguments : data - value to write
* Return Value : none
******************************************************************************/
void _phy_reg_write( uint16_t data )
{
int32_t i;
i = 16;
while( i > 0 )
{
if( (data & 0x8000) == 0 )
{
_phy_mii_write_0();
}
else
{
_phy_mii_write_1();
}
i--;
data <<= 1;
}
}
/******************************************************************************
* Function Name: _phy_ta_z0
* Description : Performs bus release so that PHY can drive data
* : for read operation
* Arguments : none
* Return Value : none
******************************************************************************/
void _phy_ta_z0( void )
{
int32_t j;
for(j = MDC_WAIT; j > 0; j--)
{
ETHERC.PIR.LONG = 0x00000000;
}
for(j = MDC_WAIT; j > 0; j--)
{
ETHERC.PIR.LONG = 0x00000001;
}
for(j = MDC_WAIT; j > 0; j--)
{
ETHERC.PIR.LONG = 0x00000001;
}
for(j = MDC_WAIT; j > 0; j--)
{
ETHERC.PIR.LONG = 0x00000000;
}
}
/******************************************************************************
* Function Name: _phy_ta_10
* Description : Switches data bus so MII interface can drive data
* : for write operation
* Arguments : none
* Return Value : none
******************************************************************************/
void _phy_ta_10(void)
{
_phy_mii_write_1();
_phy_mii_write_0();
}
/******************************************************************************
* Function Name: _phy_mii_write_1
* Description : Outputs 1 to the MII interface
* Arguments : none
* Return Value : none
******************************************************************************/
void _phy_mii_write_1( void )
{
int32_t j;
for(j = MDC_WAIT; j > 0; j--)
{
ETHERC.PIR.LONG = 0x00000006;
}
for(j = MDC_WAIT; j > 0; j--)
{
ETHERC.PIR.LONG = 0x00000007;
}
for(j = MDC_WAIT; j > 0; j--)
{
ETHERC.PIR.LONG = 0x00000007;
}
for(j = MDC_WAIT; j > 0; j--)
{
ETHERC.PIR.LONG = 0x00000006;
}
}
/******************************************************************************
* Function Name: _phy_mii_write_0
* Description : Outputs 0 to the MII interface
* Arguments : none
* Return Value : none
******************************************************************************/
void _phy_mii_write_0( void )
{
int32_t j;
for(j = MDC_WAIT; j > 0; j--)
{
ETHERC.PIR.LONG = 0x00000002;
}
for(j = MDC_WAIT; j > 0; j--)
{
ETHERC.PIR.LONG = 0x00000003;
}
for(j = MDC_WAIT; j > 0; j--)
{
ETHERC.PIR.LONG = 0x00000003;
}
for(j = MDC_WAIT; j > 0; j--)
{
ETHERC.PIR.LONG = 0x00000002;
}
}

@ -0,0 +1,84 @@
/******************************************************************************
* DISCLAIMER
* Please refer to http://www.renesas.com/disclaimer
******************************************************************************
Copyright (C) 2008. Renesas Technology Corp., All Rights Reserved.
*******************************************************************************
* File Name : phy.h
* Version : 1.02
* Description : Ethernet PHY device driver
******************************************************************************
* History : DD.MM.YYYY Version Description
* : 15.02.2010 1.00 First Release
* : 17.03.2010 1.01 Modification of macro definitions for access timing
* : 06.04.2010 1.02 RX62N changes
******************************************************************************/
#ifndef PHY_H
#define PHY_H
/******************************************************************************
Includes <System Includes> , "Project Includes"
******************************************************************************/
#include <stdint.h>
/******************************************************************************
Typedef definitions
******************************************************************************/
/******************************************************************************
Macro definitions
******************************************************************************/
/* Standard PHY Registers */
#define BASIC_MODE_CONTROL_REG 0
#define BASIC_MODE_STATUS_REG 1
#define PHY_IDENTIFIER1_REG 2
#define PHY_IDENTIFIER2_REG 3
#define AN_ADVERTISEMENT_REG 4
#define AN_LINK_PARTNER_ABILITY_REG 5
#define AN_EXPANSION_REG 6
/* Media Independent Interface */
#define PHY_ST 1
#define PHY_READ 2
#define PHY_WRITE 1
#define PHY_ADDR 0x01
#define MDC_WAIT 2
/* PHY return definitions */
#define R_PHY_OK 0
#define R_PHY_ERROR -1
/* Auto-Negotiation Link Partner Status */
#define PHY_AN_LINK_PARTNER_100BASE 0x0180
#define PHY_AN_LINK_PARTNER_FULL 0x0140
#define PHY_AN_COMPLETE ( 1 << 5 )
/*
* Wait counter definitions of PHY-LSI initialization
* ICLK = 96MHz
*/
#define PHY_RESET_WAIT 0x00000020L
#define PHY_AUTO_NEGOTIATON_WAIT 75
#define PHY_AN_ENABLE 0x1200
#define PHY_AN_10_100_F_H 0xde1
/******************************************************************************
Variable Externs
******************************************************************************/
/******************************************************************************
Functions Prototypes
******************************************************************************/
/**
* External prototypes
**/
int16_t phy_init( void );
void phy_set_100full( void );
void phy_set_10half( void );
int16_t phy_set_autonegotiate( void );
#endif /* PHY_H */

@ -0,0 +1,185 @@
/******************************************************************************
* DISCLAIMER
* Please refer to http://www.renesas.com/disclaimer
******************************************************************************
Copyright (C) 2008. Renesas Technology Corp., All Rights Reserved.
*******************************************************************************
* File Name : r_ether.h
* Version : 1.02
* Description : Ethernet module device driver
******************************************************************************
* History : DD.MM.YYYY Version Description
* : 15.02.2010 1.00 First Release
* : 03.03.2010 1.01 Buffer size is aligned on the 32-byte boundary.
* : 04.06.2010 1.02 RX62N changes
******************************************************************************/
#ifndef R_ETHER_H
#define R_ETHER_H
/******************************************************************************
Includes <System Includes> , "Project Includes"
******************************************************************************/
/******************************************************************************
Typedef definitions
******************************************************************************/
struct Descriptor
{
unsigned long status;
#if __RX_LITTLE_ENDIAN__ == 1
/* Little endian */
unsigned short size;
unsigned short bufsize;
#else
/* Big endian */
unsigned short bufsize;
unsigned short size;
#endif
char *buf_p;
struct Descriptor *next;
};
typedef struct Descriptor ethfifo;
typedef enum _NETLNK
{
PHY_NO_LINK = 0,
PHY_LINK_10H,
PHY_LINK_10F,
PHY_LINK_100H,
PHY_LINK_100F
} NETLNK;
/******************************************************************************
Macro definitions
******************************************************************************/
#define BUFSIZE 256 /* Must be 32-bit aligned */
#define ENTRY 8 /* Number of RX and TX buffers */
#define ACT 0x80000000
#define DL 0x40000000
#define FP1 0x20000000
#define FP0 0x10000000
#define FE 0x08000000
#define RFOVER 0x00000200
#define RAD 0x00000100
#define RMAF 0x00000080
#define RRF 0x00000010
#define RTLF 0x00000008
#define RTSF 0x00000004
#define PRE 0x00000002
#define CERF 0x00000001
#define TAD 0x00000100
#define CND 0x00000008
#define DLC 0x00000004
#define CD 0x00000002
#define TRO 0x00000001
/**
* Renesas Ethernet API return defines
**/
#define R_ETHER_OK 0
#define R_ETHER_ERROR -1
/* Ether Interface definitions */
#define ETH_RMII_MODE 0
#define ETH_MII_MODE 1
/* Select Ether Interface Mode */
#define ETH_MODE_SEL ETH_MII_MODE
/******************************************************************************
Variable Externs
******************************************************************************/
/******************************************************************************
Functions Prototypes
******************************************************************************/
/**
* Renesas Ethernet API prototypes
**/
long R_Ether_Open(unsigned long ch, unsigned char mac_addr[]);
long R_Ether_Close(unsigned long ch);
long R_Ether_Write(unsigned long ch, void *buf, unsigned long len);
long R_Ether_Read(unsigned long ch, void *buf);
/**
* FreeRTOS Ethernet API prototypes.
*/
/*
* Configure all the ethernet components (MAC, DMA, PHY) ready for communication.
*/
void vInitEmac( void );
/*
* Auto negotiate the link, returning pass or fail depending on whether a link
* was established or not.
*/
long lEMACWaitForLink( void );
/*
* Check the Rx status, and return the number of bytes received if any.
*/
unsigned long ulEMACRead( void );
/*
* Send uip_len bytes from uip_buf to the Tx descriptors and initiate a Tx.
*/
void vEMACWrite( void );
/****************************************************/
/* Ethernet statistic collection data */
struct enet_stats
{
unsigned long rx_packets; /* total packets received */
unsigned long tx_packets; /* total packets transmitted */
unsigned long rx_errors; /* bad packets received */
unsigned long tx_errors; /* packet transmit problems */
unsigned long rx_dropped; /* no space in buffers */
unsigned long tx_dropped; /* no space available */
unsigned long multicast; /* multicast packets received */
unsigned long collisions;
/* detailed rx_errors: */
unsigned long rx_length_errors;
unsigned long rx_over_errors; /* receiver ring buffer overflow */
unsigned long rx_crc_errors; /* recved pkt with crc error */
unsigned long rx_frame_errors; /* recv'd frame alignment error */
unsigned long rx_fifo_errors; /* recv'r fifo overrun */
unsigned long rx_missed_errors; /* receiver missed packet */
/* detailed tx_errors */
unsigned long tx_aborted_errors;
unsigned long tx_carrier_errors;
unsigned long tx_fifo_errors;
unsigned long tx_heartbeat_errors;
unsigned long tx_window_errors;
};
struct ei_device
{
const char *name;
unsigned char open;
unsigned char Tx_act;
unsigned char Rx_act;
unsigned char txing; /* Transmit Active */
unsigned char irqlock; /* EDMAC's interrupt disabled when '1'. */
unsigned char dmaing; /* EDMAC Active */
ethfifo *rxcurrent; /* current receive discripter */
ethfifo *txcurrent; /* current transmit discripter */
unsigned char save_irq; /* Original dev->irq value. */
struct enet_stats stat;
unsigned char mac_addr[6];
};
#endif /* R_ETHER_H */

@ -0,0 +1,167 @@
/**
* \addtogroup uipopt
* @{
*/
/**
* \name Project-specific configuration options
* @{
*
* uIP has a number of configuration options that can be overridden
* for each project. These are kept in a project-specific uip-conf.h
* file and all configuration names have the prefix UIP_CONF.
*/
/*
* Copyright (c) 2006, Swedish Institute of Computer Science.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the Institute nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* This file is part of the uIP TCP/IP stack
*
* $Id: uip-conf.h,v 1.6 2006/06/12 08:00:31 adam Exp $
*/
/**
* \file
* An example uIP configuration file
* \author
* Adam Dunkels <adam@sics.se>
*/
#ifndef __UIP_CONF_H__
#define __UIP_CONF_H__
#define UIP_CONF_EXTERNAL_BUFFER
#define UIP_CONF_PROCESS_HTTPD_FORMS 1
/**
* 8 bit datatype
*
* This typedef defines the 8-bit type used throughout uIP.
*
* \hideinitializer
*/
typedef unsigned char u8_t;
/**
* 16 bit datatype
*
* This typedef defines the 16-bit type used throughout uIP.
*
* \hideinitializer
*/
typedef unsigned short u16_t;
typedef unsigned long u32_t;
/**
* Statistics datatype
*
* This typedef defines the dataype used for keeping statistics in
* uIP.
*
* \hideinitializer
*/
typedef unsigned short uip_stats_t;
/**
* Maximum number of TCP connections.
*
* \hideinitializer
*/
#define UIP_CONF_MAX_CONNECTIONS 40
/**
* Maximum number of listening TCP ports.
*
* \hideinitializer
*/
#define UIP_CONF_MAX_LISTENPORTS 40
/**
* uIP buffer size.
*
* \hideinitializer
*/
#define UIP_CONF_BUFFER_SIZE 1480
/**
* CPU byte order.
*
* \hideinitializer
*/
#ifdef __RX_LITTLE_ENDIAN__
#define UIP_CONF_BYTE_ORDER UIP_LITTLE_ENDIAN
#else
#define UIP_CONF_BYTE_ORDER UIP_BIG_ENDIAN
#endif
/**
* Logging on or off
*
* \hideinitializer
*/
#define UIP_CONF_LOGGING 0
/**
* UDP support on or off
*
* \hideinitializer
*/
#define UIP_CONF_UDP 0
/**
* UDP checksums on or off
*
* \hideinitializer
*/
#define UIP_CONF_UDP_CHECKSUMS 1
/**
* uIP statistics on or off
*
* \hideinitializer
*/
#define UIP_CONF_STATISTICS 1
/* Here we include the header file for the application(s) we use in
our project. */
/*#include "smtp.h"*/
/*#include "hello-world.h"*/
/*#include "telnetd.h"*/
#include "webserver.h"
/*#include "dhcpc.h"*/
/*#include "resolv.h"*/
/*#include "webclient.h"*/
#define CCIF
#define CC_REGISTER_ARG
#endif /* __UIP_CONF_H__ */
/** @} */
/** @} */

@ -0,0 +1,47 @@
/*
* Copyright (c) 2002, Adam Dunkels.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* 3. The name of the author may not be used to endorse or promote
* products derived from this software without specific prior
* written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* This file is part of the uIP TCP/IP stack
*
* $Id: webserver.h,v 1.2 2006/06/11 21:46:38 adam Exp $
*
*/
#ifndef __WEBSERVER_H__
#define __WEBSERVER_H__
#include "apps/httpd/httpd.h"
typedef struct httpd_state uip_tcp_appstate_t;
/* UIP_APPCALL: the name of the application function. This function
must return void and take no arguments (i.e., C type "void
appfunc(void)"). */
#define UIP_APPCALL httpd_appcall
#endif /* __WEBSERVER_H__ */

@ -0,0 +1,40 @@
[HIMDBVersion]
2.0
[DATABASE_VERSION]
"11.0"
[WORKSPACE_DETAILS]
"RX600_RX62N_RSK_GNURX" "C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RSK_GNURX" "C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RSK_GNURX\RX600_RX62N_RSK_GNURX.hws" "RX" "KPIT GNURX [ELF]"
[SHARED_WORKSPACE_CONTROL_STATUS]
"" "" ""
"" "" ""
[PROJECTS]
"RTOSDemo" "C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RSK_GNURX\RTOSDemo" "C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RSK_GNURX\RTOSDemo\RTOSDemo.hwp" 0
[INFORMATION]
"No workspace information available"
[SCRAP]
[PROJECT_DEPENDENCY]
[WORKSPACE_PROPERTIES]
[HELP_FILES]
[GENERAL_DATA_PROJECT]
[USERMENUTOOLS]
[CUSTOMPLACEHOLDERS]
[MAKEFILE_BUILD_INFO]
"$(WORKSPDIR)\make\$(PROJECTNAME)_$(CONFIGNAME).mak" "" "$(WORKSPDIR)\make" 0 0 0
[VD_CONFIGURATION_OPTIONS]
"ACTIVE_DESKTOP" "0"
[VD_CONFIGURATIONS]
"0" "Default1" "1"
"1" "Default2" "1"
"2" "Default3" "1"
"3" "Default4" "1"
[OPTIONS_DEBUG_TAB]
0 0 0 0 0
[VCS]
"" "" "" 0
[VCS_PROJECT]
[MAKEFILE_ENV_STRINGS]
[MAKEFILE_ENV_FLAGS]
1 0 0
[MAKEFILE_CLEAN_INFO]
""
[END]

@ -0,0 +1,15 @@
[HIMDBVersion]
2.0
[DATABASE_VERSION]
"1.2"
[CURRENT_PROJECT]
"RTOSDemo"
[GENERAL_DATA]
[BREAKPOINTS]
[OPEN_WORKSPACE_FILES]
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RSK_GNURX\RTOSDemo\main-full.c"
[WORKSPACE_FILE_STATES]
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RSK_GNURX\RTOSDemo\main-full.c" -4 -23 1314 608 1 0
[LOADED_PROJECTS]
"RTOSDemo"
[END]
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