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@ -71,25 +71,32 @@
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/**
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* @brief Constants required to manipulate the NVIC.
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*/
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#define portNVIC_SYSTICK_CTRL ( ( volatile uint32_t * ) 0xe000e010 )
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#define portNVIC_SYSTICK_LOAD ( ( volatile uint32_t * ) 0xe000e014 )
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#define portNVIC_SYSTICK_CURRENT_VALUE ( ( volatile uint32_t * ) 0xe000e018 )
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#define portNVIC_INT_CTRL ( ( volatile uint32_t * ) 0xe000ed04 )
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#define portNVIC_SYSPRI2 ( ( volatile uint32_t * ) 0xe000ed20 )
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#define portNVIC_SYSTICK_CLK ( 0x00000004 )
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#define portNVIC_SYSTICK_INT ( 0x00000002 )
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#define portNVIC_SYSTICK_ENABLE ( 0x00000001 )
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#define portNVIC_PENDSVSET ( 0x10000000 )
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#define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000e010 ) )
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#define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile uint32_t * ) 0xe000e014 ) )
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#define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile uint32_t * ) 0xe000e018 ) )
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#define portNVIC_SYSPRI2_REG ( * ( ( volatile uint32_t * ) 0xe000ed20 ) )
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#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
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#define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
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#define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
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#define portMIN_INTERRUPT_PRIORITY ( 255UL )
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#define portNVIC_PENDSV_PRI ( portMIN_INTERRUPT_PRIORITY << 16UL )
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#define portNVIC_SYSTICK_PRI ( portMIN_INTERRUPT_PRIORITY << 24UL )
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#ifndef configSYSTICK_CLOCK_HZ
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#define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
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/* Ensure the SysTick is clocked at the same frequency as the core. */
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#define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
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#else
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/* The way the SysTick is clocked is not modified in case it is not the
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* same a the core. */
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#define portNVIC_SYSTICK_CLK_BIT ( 0 )
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#endif
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/*-----------------------------------------------------------*/
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/**
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* @brief Constants required to manipulate the SCB.
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*/
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#define portSCB_SYS_HANDLER_CTRL_STATE_REG ( * ( volatile uint32_t * ) 0xe000ed24 )
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#define portSCB_MEM_FAULT_ENABLE ( 1UL << 16UL )
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#define portSCB_MEM_FAULT_ENABLE_BIT ( 1UL << 16UL )
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/*-----------------------------------------------------------*/
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/**
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@ -169,15 +176,30 @@
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#define portMPU_RLAR_REGION_ENABLE ( 1UL )
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/* Enable privileged access to unmapped region. */
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#define portMPU_PRIV_BACKGROUND_ENABLE ( 1UL << 2UL )
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#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
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/* Enable MPU. */
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#define portMPU_ENABLE ( 1UL << 0UL )
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#define portMPU_ENABLE_BIT ( 1UL << 0UL )
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/* Expected value of the portMPU_TYPE register. */
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#define portEXPECTED_MPU_TYPE_VALUE ( 8UL << 8UL ) /* 8 regions, unified. */
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/*-----------------------------------------------------------*/
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/**
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* @brief The maximum 24-bit number.
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*
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* It is needed because the systick is a 24-bit counter.
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*/
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#define portMAX_24_BIT_NUMBER ( 0xffffffUL )
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/**
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* @brief A fiddle factor to estimate the number of SysTick counts that would
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* have occurred while the SysTick counter is stopped during tickless idle
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* calculations.
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*/
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#define portMISSED_COUNTS_FACTOR ( 45UL )
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/*-----------------------------------------------------------*/
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/**
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* @brief Constants required to set up the initial stack.
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*/
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@ -332,17 +354,211 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
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*/
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portDONT_DISCARD volatile SecureContextHandle_t xSecureContext = portNO_SECURE_CONTEXT;
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#endif /* configENABLE_TRUSTZONE */
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#if( configUSE_TICKLESS_IDLE == 1 )
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/**
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* @brief The number of SysTick increments that make up one tick period.
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*/
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static uint32_t ulTimerCountsForOneTick = 0;
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/**
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* @brief The maximum number of tick periods that can be suppressed is
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* limited by the 24 bit resolution of the SysTick timer.
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*/
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static uint32_t xMaximumPossibleSuppressedTicks = 0;
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/**
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* @brief Compensate for the CPU cycles that pass while the SysTick is
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* stopped (low power functionality only).
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*/
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static uint32_t ulStoppedTimerCompensation = 0;
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#endif /* configUSE_TICKLESS_IDLE */
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/*-----------------------------------------------------------*/
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#if( configUSE_TICKLESS_IDLE == 1 )
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__attribute__(( weak )) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
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{
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uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
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TickType_t xModifiableIdleTime;
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/* Make sure the SysTick reload value does not overflow the counter. */
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if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
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{
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xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
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}
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/* Stop the SysTick momentarily. The time the SysTick is stopped for is
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* accounted for as best it can be, but using the tickless mode will
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* inevitably result in some tiny drift of the time maintained by the
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* kernel with respect to calendar time. */
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portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
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/* Calculate the reload value required to wait xExpectedIdleTime
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* tick periods. -1 is used because this code will execute part way
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* through one of the tick periods. */
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ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
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if( ulReloadValue > ulStoppedTimerCompensation )
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{
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ulReloadValue -= ulStoppedTimerCompensation;
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}
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/* Enter a critical section but don't use the taskENTER_CRITICAL()
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* method as that will mask interrupts that should exit sleep mode. */
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__asm volatile( "cpsid i" ::: "memory" );
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__asm volatile( "dsb" );
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__asm volatile( "isb" );
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/* If a context switch is pending or a task is waiting for the scheduler
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* to be un-suspended then abandon the low power entry. */
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if( eTaskConfirmSleepModeStatus() == eAbortSleep )
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{
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/* Restart from whatever is left in the count register to complete
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* this tick period. */
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portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
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/* Restart SysTick. */
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portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
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/* Reset the reload register to the value required for normal tick
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* periods. */
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portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
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/* Re-enable interrupts - see comments above the cpsid instruction()
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* above. */
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__asm volatile( "cpsie i" ::: "memory" );
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}
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else
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{
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/* Set the new reload value. */
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portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
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/* Clear the SysTick count flag and set the count value back to
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* zero. */
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portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
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/* Restart SysTick. */
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portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
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/* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
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* set its parameter to 0 to indicate that its implementation
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* contains its own wait for interrupt or wait for event
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* instruction, and so wfi should not be executed again. However,
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* the original expected idle time variable must remain unmodified,
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* so a copy is taken. */
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xModifiableIdleTime = xExpectedIdleTime;
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configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
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if( xModifiableIdleTime > 0 )
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{
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__asm volatile( "dsb" ::: "memory" );
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__asm volatile( "wfi" );
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__asm volatile( "isb" );
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}
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configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
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/* Re-enable interrupts to allow the interrupt that brought the MCU
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* out of sleep mode to execute immediately. See comments above
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* the cpsid instruction above. */
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__asm volatile( "cpsie i" ::: "memory" );
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__asm volatile( "dsb" );
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__asm volatile( "isb" );
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/* Disable interrupts again because the clock is about to be stopped
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* and interrupts that execute while the clock is stopped will
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* increase any slippage between the time maintained by the RTOS and
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* calendar time. */
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__asm volatile( "cpsid i" ::: "memory" );
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__asm volatile( "dsb" );
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__asm volatile( "isb" );
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/* Disable the SysTick clock without reading the
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* portNVIC_SYSTICK_CTRL_REG register to ensure the
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* portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.
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* Again, the time the SysTick is stopped for is accounted for as
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* best it can be, but using the tickless mode will inevitably
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* result in some tiny drift of the time maintained by the kernel
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* with respect to calendar time*/
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portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
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/* Determine if the SysTick clock has already counted to zero and
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* been set back to the current reload value (the reload back being
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* correct for the entire expected idle time) or if the SysTick is
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* yet to count to zero (in which case an interrupt other than the
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* SysTick must have brought the system out of sleep mode). */
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if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
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{
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uint32_t ulCalculatedLoadValue;
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/* The tick interrupt is already pending, and the SysTick count
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* reloaded with ulReloadValue. Reset the
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* portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
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* period. */
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ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
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/* Don't allow a tiny value, or values that have somehow
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* underflowed because the post sleep hook did something
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* that took too long. */
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if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
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{
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ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
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}
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portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
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/* As the pending tick will be processed as soon as this
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* function exits, the tick value maintained by the tick is
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* stepped forward by one less than the time spent waiting. */
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ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
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}
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else
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{
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/* Something other than the tick interrupt ended the sleep.
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* Work out how long the sleep lasted rounded to complete tick
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* periods (not the ulReload value which accounted for part
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* ticks). */
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ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
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/* How many complete tick periods passed while the processor
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* was waiting? */
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ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
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/* The reload value is set to whatever fraction of a single tick
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* period remains. */
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portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
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}
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/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
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* again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
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* value. */
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portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
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portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
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vTaskStepTick( ulCompleteTickPeriods );
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portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
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/* Exit with interrupts enabled. */
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__asm volatile( "cpsie i" ::: "memory" );
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}
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}
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#endif /* configUSE_TICKLESS_IDLE */
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/*-----------------------------------------------------------*/
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__attribute__(( weak )) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */
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{
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/* Calculate the constants required to configure the tick interrupt. */
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#if( configUSE_TICKLESS_IDLE == 1 )
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{
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ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
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xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
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ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
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}
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#endif /* configUSE_TICKLESS_IDLE */
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/* Stop and reset the SysTick. */
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*( portNVIC_SYSTICK_CTRL ) = 0UL;
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*( portNVIC_SYSTICK_CURRENT_VALUE ) = 0UL;
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portNVIC_SYSTICK_CTRL_REG = 0UL;
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portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
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/* Configure SysTick to interrupt at the requested rate. */
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*( portNVIC_SYSTICK_LOAD ) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
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*( portNVIC_SYSTICK_CTRL ) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;
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portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
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portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
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}
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/*-----------------------------------------------------------*/
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@ -446,11 +662,11 @@ volatile uint32_t ulDummy = 0UL;
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( portMPU_RLAR_REGION_ENABLE );
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/* Enable mem fault. */
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portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE;
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portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT;
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/* Enable MPU with privileged background access i.e. unmapped
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* regions have privileged access. */
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portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE | portMPU_ENABLE );
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portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
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}
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}
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#endif /* configENABLE_MPU */
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@ -484,7 +700,7 @@ volatile uint32_t ulDummy = 0UL;
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void vPortYield( void ) /* PRIVILEGED_FUNCTION */
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{
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/* Set a PendSV to request a context switch. */
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*( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET;
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portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
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/* Barriers are normally not required but do ensure the code is
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* completely within the specified behaviour for the architecture. */
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@ -527,7 +743,7 @@ uint32_t ulPreviousMask;
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if( xTaskIncrementTick() != pdFALSE )
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{
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/* Pend a context switch. */
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*( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET;
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portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
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}
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}
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portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
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@ -772,8 +988,8 @@ uint8_t ucSVCNumber;
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BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
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{
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/* Make PendSV, CallSV and SysTick the same priority as the kernel. */
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*( portNVIC_SYSPRI2 ) |= portNVIC_PENDSV_PRI;
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*( portNVIC_SYSPRI2 ) |= portNVIC_SYSTICK_PRI;
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portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
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portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
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#if( configENABLE_MPU == 1 )
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{
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Gaurav-Aggarwal-AWS
5 years ago
committed by
GitHub