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Finalise XMC1000 GCC demos.

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pull/4/head
Richard Barry 12 years ago
parent 42c0ae6bc8
commit 0e28ee90b6
13 changed files with 683 additions and 5 deletions
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120
FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/.cproject
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@ -108,7 +108,7 @@
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@ -221,7 +220,120 @@
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@ -233,9 +345,11 @@
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10
FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/.settings/org.eclipse.cdt.managedbuilder.core.prefs
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@ -5,6 +5,12 @@ environment/buildEnvironmentInclude/com.atollic.truestudio.exe.debug.2093031755.
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2
FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/Atollic_Specific/startup_XMC1200.s → FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/Atollic_Specific/startup_XMC1300.s
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@ -1,7 +1,7 @@
/**
*****************************************************************************
**
** File : startup_XMC1200.s
** File : startup_XMC1300.s
**
** Abstract : This assembler file contains interrupt vector and
** startup code for ARM.

130
FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/Atollic_Specific/system_XMC1100.c
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@ -0,0 +1,130 @@
/******************************************************************************
* @file system_XMC1100.c
* @brief Device specific initialization for the XMC1100-Series according
* to CMSIS
* @version V1.4
* @date 01 Feb 2013
*
* @note
* Copyright (C) 2012-2013 Infineon Technologies AG. All rights reserved.
*
* @par
* Infineon Technologies AG (Infineon) is supplying this software for use with
* Infineon’s microcontrollers.
*
* This file can be freely distributed within development tools that are
* supporting such microcontrollers.
*
*
* @par
* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
* INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
* OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
*
******************************************************************************/
/*
* *************************** Change history ********************************
* V1.2, 13 Dec 2012, PKB : Created change history table
* V1.3, 20 Dec 2012, PKB : Fixed SystemCoreClock computation
* V1.3, 01 Feb 2013, PKB : SCU_CLOCK -> SCU_CLK
*/
#include "system_XMC1100.h"
#include <XMC1100.h>
/*---------------------------------------------------------------------------
Extern definitions
*--------------------------------------------------------------------------*/
extern uint32_t AllowClkInitByStartup(void);
/*----------------------------------------------------------------------------
Clock Global defines
*----------------------------------------------------------------------------*/
#define DCO_DCLK 64000000UL
#define DCO_DCLK_MULTIPLIER 16384000UL
#define DCO_DCLK_DIVIDER 9UL
#define MCLK_MHZ 32000000UL
#define KHZ_MULTIPLIER 1000UL
#define FRACBITS 8UL
/*----------------------------------------------------------------------------
Clock Variable definitions
*----------------------------------------------------------------------------*/
/*!< System Clock Frequency (Core Clock) (MCLK on TIMM1) */
uint32_t SystemCoreClock;
/*----------------------------------------------------------------------------
Fixed point math definitions
*----------------------------------------------------------------------------*/
typedef int32_t Q_24_8;
typedef int32_t Q_15_0;
/**
* @brief Setup the microcontroller system.
* @param None
* @retval None
*/
void SystemInit(void)
{
/*
* Clock tree setup by CMSIS routines is allowed only in the absence of DAVE
* Clock app.
*/
if(AllowClkInitByStartup()){
/* Do not change default values of IDIV,FDIV and RTCCLKSEL */
/* ====== Default configuration ======= */
/*
* MCLK = DCO_DCLK
* PCLK = MCLK
* RTC CLK = Standby clock
*/
}
}
/**
* @brief Update SystemCoreClock according to Clock Register Values
* @note -
* @param None
* @retval None
*/
void SystemCoreClockUpdate(void)
{
uint32_t IDIV, FDIV, CLKCR, Clock;
CLKCR = SCU_CLK -> CLKCR;
IDIV = (CLKCR & SCU_CLK_CLKCR_IDIV_Msk) >> SCU_CLK_CLKCR_IDIV_Pos;
FDIV = (CLKCR & SCU_CLK_CLKCR_FDIV_Msk) >> SCU_CLK_CLKCR_FDIV_Pos;
if(IDIV)
{
/* Divider is enabled and used */
if(0 == FDIV)
{
/* No fractional divider, so MCLK = DCO_Clk / (2 * IDIV) */
Clock = MCLK_MHZ / IDIV;
}
else
{
/* Both integer and fractional divider must be considered */
/* 1. IDIV + FDIV/256 */
Q_24_8 FDiv_IDiv_Sum = (IDIV << FRACBITS) + FDIV;
/* 2. Fixed point division Q24.8 / Q9.8 = Q15.0 */
Q_15_0 ClockVal = (DCO_DCLK_MULTIPLIER << FRACBITS)/ FDiv_IDiv_Sum;
Clock = ((uint32_t)ClockVal) * KHZ_MULTIPLIER;
Clock = Clock >> DCO_DCLK_DIVIDER;
}
}
else
{
/* Divider bypassed. Simply divide DCO_DCLK by 2 */
Clock = MCLK_MHZ;
}
/* Finally with the math class over, update SystemCoreClock */
SystemCoreClock = Clock;
}

55
FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/Atollic_Specific/system_XMC1100.h
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/******************************************************************************
* @file system_XMC1100.h
* @brief Device specific initialization for the XMC1100-Series according
* to CMSIS
* @version V1.1
* @date 13 Dec 2012
*
* @note
* Copyright (C) 2012-2013 Infineon Technologies AG. All rights reserved.
*
* @par
* Infineon Technologies AG (Infineon) is supplying this software for use with
* Infineon’s microcontrollers.
*
* This file can be freely distributed within development tools that are
* supporting such microcontrollers.
*
*
* @par
* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
* INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
* OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
*
******************************************************************************/
/*
* *************************** Change history ********************************
* V1.1, 13 Dec 2012, PKB : Created change history table, extern reference
*/
#include <stdint.h>
/*----------------------------------------------------------------------------
Clock Variable definitions
*----------------------------------------------------------------------------*/
extern uint32_t SystemCoreClock;
/**
* @brief Setup the microcontroller system.
* Initialize the PLL and update the
* SystemCoreClock variable.
* @param None
* @retval None
*/
void SystemInit(void);
/**
* @brief Update SystemCoreClock according to Clock Register Values
* @note -
* @param None
* @retval None
*/
void SystemCoreClockUpdate(void);

130
FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/Atollic_Specific/system_XMC1200.c
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/******************************************************************************
* @file system_XMC1200.c
* @brief Device specific initialization for the XMC1200-Series according
* to CMSIS
* @version V1.4
* @date 01 Feb 2013
*
* @note
* Copyright (C) 2012-2013 Infineon Technologies AG. All rights reserved.
*
* @par
* Infineon Technologies AG (Infineon) is supplying this software for use with
* Infineon’s microcontrollers.
*
* This file can be freely distributed within development tools that are
* supporting such microcontrollers.
*
*
* @par
* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
* INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
* OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
*
******************************************************************************/
/*
* *************************** Change history ********************************
* V1.2, 13 Dec 2012, PKB : Created change history table
* V1.3, 20 Dec 2012, PKB : Fixed SystemCoreClock computation
* V1.4, 01 Feb 2013, PKB : SCU_CLOCK -> SCU_CLK
*/
#include "system_XMC1200.h"
#include <XMC1200.h>
/*---------------------------------------------------------------------------
Extern definitions
*--------------------------------------------------------------------------*/
extern uint32_t AllowClkInitByStartup(void);
/*----------------------------------------------------------------------------
Clock Global defines
*----------------------------------------------------------------------------*/
#define DCO_DCLK 64000000UL
#define DCO_DCLK_MULTIPLIER 16384000UL
#define DCO_DCLK_DIVIDER 9UL
#define MCLK_MHZ 32000000UL
#define KHZ_MULTIPLIER 1000UL
#define FRACBITS 8UL
/*----------------------------------------------------------------------------
Clock Variable definitions
*----------------------------------------------------------------------------*/
/*!< System Clock Frequency (Core Clock) (MCLK on TIMM1) */
uint32_t SystemCoreClock;
/*----------------------------------------------------------------------------
Fixed point math definitions
*----------------------------------------------------------------------------*/
typedef int32_t Q_24_8;
typedef int32_t Q_15_0;
/**
* @brief Setup the microcontroller system.
* @param None
* @retval None
*/
void SystemInit(void)
{
/*
* Clock tree setup by CMSIS routines is allowed only in the absence of DAVE
* Clock app.
*/
if(AllowClkInitByStartup()){
/* Do not change default values of IDIV,FDIV and RTCCLKSEL */
/* ====== Default configuration ======= */
/*
* MCLK = DCO_DCLK
* PCLK = MCLK
* RTC CLK = Standby clock
*/
}
}
/**
* @brief Update SystemCoreClock according to Clock Register Values
* @note -
* @param None
* @retval None
*/
void SystemCoreClockUpdate(void)
{
uint32_t IDIV, FDIV, CLKCR, Clock;
CLKCR = SCU_CLK -> CLKCR;
IDIV = (CLKCR & SCU_CLK_CLKCR_IDIV_Msk) >> SCU_CLK_CLKCR_IDIV_Pos;
FDIV = (CLKCR & SCU_CLK_CLKCR_FDIV_Msk) >> SCU_CLK_CLKCR_FDIV_Pos;
if(IDIV)
{
/* Divider is enabled and used */
if(0 == FDIV)
{
/* No fractional divider, so MCLK = DCO_Clk / (2 * IDIV) */
Clock = MCLK_MHZ / IDIV;
}
else
{
/* Both integer and fractional divider must be considered */
/* 1. IDIV + FDIV/256 */
Q_24_8 FDiv_IDiv_Sum = (IDIV << FRACBITS) + FDIV;
/* 2. Fixed point division Q24.8 / Q9.8 = Q15.0 */
Q_15_0 ClockVal = (DCO_DCLK_MULTIPLIER << FRACBITS)/ FDiv_IDiv_Sum;
Clock = ((uint32_t)ClockVal) * KHZ_MULTIPLIER;
Clock = Clock >> DCO_DCLK_DIVIDER;
}
}
else
{
/* Divider bypassed. Simply divide DCO_DCLK by 2 */
Clock = MCLK_MHZ;
}
/* Finally with the math class over, update SystemCoreClock */
SystemCoreClock = Clock;
}

55
FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/Atollic_Specific/system_XMC1200.h
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/******************************************************************************
* @file system_XMC1200.h
* @brief Device specific initialization for the XMC1200-Series according
* to CMSIS
* @version V1.1
* @date 13 Dec 2012
*
* @note
* Copyright (C) 2012-2013 Infineon Technologies AG. All rights reserved.
*
* @par
* Infineon Technologies AG (Infineon) is supplying this software for use with
* Infineon’s microcontrollers.
*
* This file can be freely distributed within development tools that are
* supporting such microcontrollers.
*
*
* @par
* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
* INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
* OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
*
******************************************************************************/
/*
* **************************** Change history *******************************
* V1.1, 13 Dec 2012, PKB : Created this table, added extern and stdint
*/
#include <stdint.h>
/*----------------------------------------------------------------------------
Clock Variable definitions
*----------------------------------------------------------------------------*/
extern uint32_t SystemCoreClock;
/**
* @brief Setup the microcontroller system.
* Initialize the PLL and update the
* SystemCoreClock variable.
* @param None
* @retval None
*/
void SystemInit(void);
/**
* @brief Update SystemCoreClock according to Clock Register Values
* @note -
* @param None
* @retval None
*/
void SystemCoreClockUpdate(void);

130
FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/Atollic_Specific/system_XMC1300.c
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/******************************************************************************
* @file system_XMC1300.c
* @brief Device specific initialization for the XMC1300-Series according
* to CMSIS
* @version V1.4
* @date 01 Feb 2013
*
* @note
* Copyright (C) 2012-2013 Infineon Technologies AG. All rights reserved.
*
* @par
* Infineon Technologies AG (Infineon) is supplying this software for use with
* Infineon’s microcontrollers.
*
* This file can be freely distributed within development tools that are
* supporting such microcontrollers.
*
*
* @par
* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
* INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
* OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
*
******************************************************************************/
/*
* *************************** Change history ********************************
* V1.2, 13 Dec 2012, PKB : Created change history table
* V1.3, 20 Dec 2012, PKB : Fixed SystemCoreClock computation
* V1.4, 02 Feb 2013, PKB : SCU_CLOCK -> SCU_CLK
*/
#include "system_XMC1300.h"
#include <XMC1300.h>
/*---------------------------------------------------------------------------
Extern definitions
*--------------------------------------------------------------------------*/
extern uint32_t AllowClkInitByStartup(void);
/*----------------------------------------------------------------------------
Clock Global defines
*----------------------------------------------------------------------------*/
#define DCO_DCLK 64000000UL
#define DCO_DCLK_MULTIPLIER 16384000UL
#define DCO_DCLK_DIVIDER 9UL
#define MCLK_MHZ 32000000UL
#define KHZ_MULTIPLIER 1000UL
#define FRACBITS 8UL
/*----------------------------------------------------------------------------
Clock Variable definitions
*----------------------------------------------------------------------------*/
/*!< System Clock Frequency (Core Clock) (MCLK on TIMM1) */
uint32_t SystemCoreClock;
/*----------------------------------------------------------------------------
Fixed point math definitions
*----------------------------------------------------------------------------*/
typedef int32_t Q_24_8;
typedef int32_t Q_15_0;
/**
* @brief Setup the microcontroller system.
* @param None
* @retval None
*/
void SystemInit(void)
{
/*
* Clock tree setup by CMSIS routines is allowed only in the absence of DAVE
* Clock app.
*/
if(AllowClkInitByStartup()){
/* Do not change default values of IDIV,FDIV and RTCCLKSEL */
/* ====== Default configuration ======= */
/*
* MCLK = DCO_DCLK
* PCLK = MCLK
* RTC CLK = Standby clock
*/
}
}
/**
* @brief Update SystemCoreClock according to Clock Register Values
* @note -
* @param None
* @retval None
*/
void SystemCoreClockUpdate(void)
{
uint32_t IDIV, FDIV, CLKCR, Clock;
CLKCR = SCU_CLK -> CLKCR;
IDIV = (CLKCR & SCU_CLK_CLKCR_IDIV_Msk) >> SCU_CLK_CLKCR_IDIV_Pos;
FDIV = (CLKCR & SCU_CLK_CLKCR_FDIV_Msk) >> SCU_CLK_CLKCR_FDIV_Pos;
if(IDIV)
{
/* Divider is enabled and used */
if(0 == FDIV)
{
/* No fractional divider, so MCLK = DCO_Clk / (2 * IDIV) */
Clock = MCLK_MHZ / IDIV;
}
else
{
/* Both integer and fractional divider must be considered */
/* 1. IDIV + FDIV/256 */
Q_24_8 FDiv_IDiv_Sum = (IDIV << FRACBITS) + FDIV;
/* 2. Fixed point division Q24.8 / Q9.8 = Q15.0 */
Q_15_0 ClockVal = (DCO_DCLK_MULTIPLIER << FRACBITS)/ FDiv_IDiv_Sum;
Clock = ((uint32_t)ClockVal) * KHZ_MULTIPLIER;
Clock = Clock >> DCO_DCLK_DIVIDER;
}
}
else
{
/* Divider bypassed. Simply divide DCO_DCLK by 2 */
Clock = MCLK_MHZ;
}
/* Finally with the math class over, update SystemCoreClock */
SystemCoreClock = Clock;
}

54
FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/Atollic_Specific/system_XMC1300.h
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@ -0,0 +1,54 @@
/******************************************************************************
* @file system_XMC1300.h
* @brief Device specific initialization for the XMC1300-Series according
* to CMSIS
* @version V1.1
* @date 13 Dec 2012
*
* @note
* Copyright (C) 2012-2013 Infineon Technologies AG. All rights reserved.
*
* @par
* Infineon Technologies AG (Infineon) is supplying this software for use with
* Infineon’s microcontrollers.
*
* This file can be freely distributed within development tools that are
* supporting such microcontrollers.
*
*
* @par
* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
* INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
* OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
*
******************************************************************************/
/*
* *************************** Change history *********************************
* V1.1, 13 Dec 2012, PKB, Created this table, added extern and stdint
*/
#include <stdint.h>
/*----------------------------------------------------------------------------
Clock Variable definitions
*----------------------------------------------------------------------------*/
extern uint32_t SystemCoreClock;
/**
* @brief Setup the microcontroller system.
* Initialize the PLL and update the
* SystemCoreClock variable.
* @param None
* @retval None
*/
void SystemInit(void);
/**
* @brief Update SystemCoreClock according to Clock Register Values
* @note -
* @param None
* @retval None
*/
void SystemCoreClockUpdate(void);

0
FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/IAR_Specific/XMC1100.h → FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/XMC1100.h
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0
FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/IAR_Specific/XMC1200.h → FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/XMC1200.h
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0
FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/IAR_Specific/XMC1300.h → FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/XMC1300.h
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2
FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/main.c
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@ -93,7 +93,7 @@
/* Set mainCREATE_SIMPLE_BLINKY_DEMO_ONLY to one to run the simple blinky demo,
or 0 to run the more comprehensive test and demo application. */
#define mainCREATE_SIMPLE_BLINKY_DEMO_ONLY 1
#define mainCREATE_SIMPLE_BLINKY_DEMO_ONLY 0
/*-----------------------------------------------------------*/

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