Slight mods to comments in STR75X GCC port and demo files.

pull/4/head
Richard Barry 18 years ago
parent 6ac900dc95
commit 09969dc53e

@ -1,7 +1,8 @@
/*
This is the default Startup for STR75x devices for the GNU toolchain
It has been designed by ST Microelectronics and modified by Raisonance.
It has been designed by ST Microelectronics and modified by Raisonance
and FreeRTOS.org.
You can use it, modify it, distribute it freely but without any waranty.

@ -34,6 +34,15 @@
BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR UART0.
*/
/*-----------------------------------------------------------
* Components that can be compiled to either ARM or THUMB mode are
* contained in this file.c The ISR routines, which can only be compiled
* to ARM mode, are contained in serialISR.c.
*----------------------------------------------------------*/
/* Library includes. */
#include "75x_uart.h"
#include "75x_gpio.h"

@ -30,6 +30,14 @@
***************************************************************************
*/
/*-----------------------------------------------------------
* Components that can be compiled to either ARM or THUMB mode are
* contained in serial.c The ISR routines, which can only be compiled
* to ARM mode, are contained in this file.
*----------------------------------------------------------*/
/* Library includes. */
#include "75x_uart.h"

@ -113,6 +113,10 @@
#include "..\..\Source\portable\IAR\STR75x\portmacro.h"
#endif
#ifdef STR75X_GCC
#include "..\..\Source\portable\GCC\STR75x\portmacro.h"
#endif
#ifdef STR91X_IAR
#include "..\..\Source\portable\IAR\STR91x\portmacro.h"
#endif

@ -57,10 +57,9 @@
/*-----------------------------------------------------------*/
/* Setup the watchdog to generate the tick interrupts. */
/* Setup the TB to generate the tick interrupts. */
static void prvSetupTimerInterrupt( void );
/*-----------------------------------------------------------*/
/*

@ -40,15 +40,10 @@
/*
*/
/* Scheduler includes. */
#include "FreeRTOS.h"
#include "task.h"
/* Constants required to handle interrupts. */
#define portTIMER_MATCH_ISR_BIT ( ( unsigned portCHAR ) 0x01 )
#define portCLEAR_VIC_INTERRUPT ( ( unsigned portLONG ) 0 )
/* Constants required to handle critical sections. */
#define portNO_CRITICAL_NESTING ( ( unsigned portLONG ) 0 )
@ -91,13 +86,11 @@ void vPortISRStartFirstTask( void )
\
/* And return - correcting the offset in the LR to obtain the */ \
/* correct address. */ \
"SUBS PC, LR, #4 \n\t" \
); \
"SUBS PC, LR, #4 \n\t" \
);
}
/*-----------------------------------------------------------*/
/* The preemptive scheduler is defined as "naked" as the full context is
saved on entry as part of the context switch. */
void vPortTickISR( void )
{
/* Increment the RTOS tick count, then look for the highest priority
@ -148,11 +141,8 @@ void vPortTickISR( void )
}
#endif /* THUMB_INTERWORK */
/*-----------------------------------------------------------*/
/* The code generated by the GCC compiler uses the stack in different ways at
different optimisation levels. The interrupt flags can therefore not always
be saved to the stack. Instead the critical section nesting level is stored
in a variable, which is then saved as part of the stack context. */
void vPortEnterCritical( void )
{
/* Disable interrupts as per portDISABLE_INTERRUPTS(); */
@ -168,6 +158,7 @@ void vPortEnterCritical( void )
portENTER_CRITICAL() has been called. */
ulCriticalNesting++;
}
/*-----------------------------------------------------------*/
void vPortExitCritical( void )
{

@ -56,7 +56,7 @@
/*-----------------------------------------------------------*/
/* Setup the watchdog to generate the tick interrupts. */
/* Setup the TB to generate the tick interrupts. */
static void prvSetupTimerInterrupt( void );
/* ulCriticalNesting will get set to zero when the first task starts. It

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