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/*
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* FreeRTOS Kernel <DEVELOPMENT BRANCH>
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* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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*
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
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* this software and associated documentation files (the "Software"), to deal in
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* the Software without restriction, including without limitation the rights to
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* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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* the Software, and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* https://www.FreeRTOS.org
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* https://github.com/FreeRTOS
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*
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*/
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#ifndef PORTHARDWARE_H
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#define PORTHARDWARE_H
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#ifndef __IAR_SYSTEMS_ASM__
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#include <ioavr.h>
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#endif
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#include "FreeRTOSConfig.h"
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/*-----------------------------------------------------------*/
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#if ( configUSE_TIMER_INSTANCE == 0 )
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#define TICK_INT_vect TCB0_INT_vect
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#define INT_FLAGS TCB0_INTFLAGS
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#define INT_MASK TCB_CAPT_bm
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#define TICK_init() \
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{ \
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TCB0.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
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TCB0.INTCTRL = TCB_CAPT_bm; \
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TCB0.CTRLA = TCB_ENABLE_bm; \
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}
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#elif ( configUSE_TIMER_INSTANCE == 1 )
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#define TICK_INT_vect TCB1_INT_vect
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#define INT_FLAGS TCB1_INTFLAGS
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#define INT_MASK TCB_CAPT_bm
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#define TICK_init() \
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{ \
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TCB1.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
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TCB1.INTCTRL = TCB_CAPT_bm; \
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TCB1.CTRLA = TCB_ENABLE_bm; \
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}
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#elif ( configUSE_TIMER_INSTANCE == 2 )
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#define TICK_INT_vect TCB2_INT_vect
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#define INT_FLAGS TCB2_INTFLAGS
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#define INT_MASK TCB_CAPT_bm
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#define TICK_init() \
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{ \
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TCB2.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
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TCB2.INTCTRL = TCB_CAPT_bm; \
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TCB2.CTRLA = TCB_ENABLE_bm; \
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}
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#elif ( configUSE_TIMER_INSTANCE == 3 )
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#define TICK_INT_vect TCB3_INT_vect
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#define INT_FLAGS TCB3_INTFLAGS
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#define INT_MASK TCB_CAPT_bm
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#define TICK_init() \
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{ \
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TCB3.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
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TCB3.INTCTRL = TCB_CAPT_bm; \
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TCB3.CTRLA = TCB_ENABLE_bm; \
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}
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#elif ( configUSE_TIMER_INSTANCE == 4 )
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#define TICK_INT_vect TCB4_INT_vect
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#define INT_FLAGS TCB4_INTFLAGS
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#define INT_MASK TCB_CAPT_bm
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#define TICK_init() \
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{ \
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TCB4.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
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TCB4.INTCTRL = TCB_CAPT_bm; \
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TCB4.CTRLA = TCB_ENABLE_bm; \
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}
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#elif ( configUSE_TIMER_INSTANCE == 5 )
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#define TICK_INT_vect RTC_CNT_vect
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#define INT_FLAGS RTC_INTFLAGS
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#define INT_MASK RTC_OVF_bm
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/* Hertz to period for RTC setup */
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#define RTC_PERIOD_HZ( x ) ( 32768 * ( ( 1.0 / x ) ) )
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#define TICK_init() \
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{ \
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while( RTC.STATUS > 0 ) {; } \
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RTC.CTRLA = RTC_PRESCALER_DIV1_gc | 1 << RTC_RTCEN_bp; \
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RTC.PER = RTC_PERIOD_HZ( configTICK_RATE_HZ ); \
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RTC.INTCTRL |= 1 << RTC_OVF_bp; \
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}
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#else /* if ( configUSE_TIMER_INSTANCE == 0 ) */
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#undef TICK_INT_vect
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#undef INT_FLAGS
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#undef INT_MASK
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#undef TICK_init()
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#error Invalid timer setting.
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#endif /* if ( configUSE_TIMER_INSTANCE == 0 ) */
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/*-----------------------------------------------------------*/
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#endif /* PORTHARDWARE_H */
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