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;/*
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; FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.
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;
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;
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; ***************************************************************************
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; * *
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; * FreeRTOS tutorial books are available in pdf and paperback. *
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; * Complete, revised, and edited pdf reference manuals are also *
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; * available. *
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; * *
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; * Purchasing FreeRTOS documentation will not only help you, by *
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; * ensuring you get running as quickly as possible and with an *
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; * in-depth knowledge of how to use FreeRTOS, it will also help *
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; * the FreeRTOS project to continue with its mission of providing *
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; * professional grade, cross platform, de facto standard solutions *
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; * for microcontrollers - completely free of charge! *
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; * *
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; * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
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; * *
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; * Thank you for using FreeRTOS, and thank you for your support! *
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; * *
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; ***************************************************************************
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;
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;
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; This file is part of the FreeRTOS distribution.
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;
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; FreeRTOS is free software; you can redistribute it and/or modify it under
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; the terms of the GNU General Public License (version 2) as published by the
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; Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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; >>>NOTE<<< The modification to the GPL is included to allow you to
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; distribute a combined work that includes FreeRTOS without being obliged to
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; provide the source code for proprietary components outside of the FreeRTOS
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; kernel. FreeRTOS is distributed in the hope that it will be useful, but
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; WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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; more details. You should have received a copy of the GNU General Public
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; License and the FreeRTOS license exception along with FreeRTOS; if not it
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; can be viewed here: http://www.freertos.org/a00114.html and also obtained
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; by writing to Richard Barry, contact details for whom are available on the
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; FreeRTOS WEB site.
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;
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; 1 tab == 4 spaces!
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;
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; http://www.FreeRTOS.org - Documentation, latest information, license and
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; contact details.
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;
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; http://www.SafeRTOS.com - A version that is certified for use in safety
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; critical systems.
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;
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; http://www.OpenRTOS.com - Commercial support, development, porting,
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; licensing and training services.
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;*/
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.import _ulRegTest1CycleCount
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.import _ulRegTest2CycleCount
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.import _vPortYield
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.export _vRegTest1Task
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.export _vRegTest2Task
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.section P, code, align=4
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_vRegTest1Task:
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; Fill the registers with known values.
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mov #2, r1
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mov #3, r2
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mov #4, r3
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mov #5, r4
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mov #6, r5
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mov #7, r6
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mov #8, r7
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mov #9, r8
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mov #10, r9
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mov #11, r10
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mov #12, r11
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mov #13, r12
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mov #14, r13
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mov #15, r14
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mov #16, r0
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lds r0, macl
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mov #17, r0
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lds r0, mach
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mov #18, r0
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ldc r0, gbr
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; Also fill the flop registers with known values.
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lds r1, fpul
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fsts fpul, fr1
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lds r2, fpul
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fsts fpul, fr2
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lds r3, fpul
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fsts fpul, fr3
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lds r4, fpul
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fsts fpul, fr4
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lds r5, fpul
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fsts fpul, fr5
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lds r6, fpul
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fsts fpul, fr6
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lds r7, fpul
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fsts fpul, fr7
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lds r8, fpul
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fsts fpul, fr8
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lds r9, fpul
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fsts fpul, fr9
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lds r10, fpul
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fsts fpul, fr10
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lds r11, fpul
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fsts fpul, fr11
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lds r12, fpul
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fsts fpul, fr12
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lds r13, fpul
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fsts fpul, fr13
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lds r14, fpul
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fsts fpul, fr14
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_vRegTest1Loop:
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; Reset r1 which was used in the tests.
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mov #2, r1
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; Test that the registers still contain the expected values. If not, jump to
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; vRegTestError, which will stop this function looping and so cause it to stop
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; incrementing its loop counter. Both the standard and flop registers are
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; checked.
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mov #2, r0
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cmp/eq r0, r1
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bf _vRegTest1Error
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flds fr1, fpul
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sts fpul, r1
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cmp/eq r0, r1
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bf _vRegTest1Error
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mov #3, r0
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cmp/eq r0, r2
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bf _vRegTest1Error
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flds fr2, fpul
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sts fpul, r1
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cmp/eq r0, r1
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bf _vRegTest1Error
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mov #4, r0
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cmp/eq r0, r3
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bf _vRegTest1Error
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flds fr3, fpul
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sts fpul, r1
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cmp/eq r0, r1
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bf _vRegTest1Error
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mov #5, r0
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cmp/eq r0, r4
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bf _vRegTest1Error
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flds fr4, fpul
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sts fpul, r1
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cmp/eq r0, r1
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bf _vRegTest1Error
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mov #6, r0
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cmp/eq r0, r5
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bf _vRegTest1Error
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flds fr5, fpul
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sts fpul, r1
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cmp/eq r0, r1
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bf _vRegTest1Error
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mov #7, r0
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cmp/eq r0, r6
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bf _vRegTest1Error
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flds fr6, fpul
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sts fpul, r1
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cmp/eq r0, r1
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bf _vRegTest1Error
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mov #8, r0
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cmp/eq r0, r7
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bf _vRegTest1Error
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flds fr7, fpul
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sts fpul, r1
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cmp/eq r0, r1
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bf _vRegTest1Error
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mov #9, r0
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cmp/eq r0, r8
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bf _vRegTest1Error
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flds fr8, fpul
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sts fpul, r1
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cmp/eq r0, r1
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bf _vRegTest1Error
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mov #10, r0
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cmp/eq r0, r9
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bf _vRegTest1Error
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flds fr9, fpul
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sts fpul, r1
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cmp/eq r0, r1
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bf _vRegTest1Error
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mov #11, r0
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cmp/eq r0, r10
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bf _vRegTest1Error
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flds fr10, fpul
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sts fpul, r1
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cmp/eq r0, r1
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bf _vRegTest1Error
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mov #12, r0
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cmp/eq r0, r11
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bf _vRegTest1Error
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flds fr11, fpul
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sts fpul, r1
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cmp/eq r0, r1
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bf _vRegTest1Error
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mov #13, r0
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cmp/eq r0, r12
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bf _vRegTest1Error
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flds fr12, fpul
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sts fpul, r1
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cmp/eq r0, r1
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bf _vRegTest1Error
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mov #14, r0
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cmp/eq r0, r13
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bf _vRegTest1Error
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flds fr13, fpul
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sts fpul, r1
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cmp/eq r0, r1
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bf _vRegTest1Error
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mov #15, r0
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cmp/eq r0, r14
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bf _vRegTest1Error
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flds fr14, fpul
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sts fpul, r1
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cmp/eq r0, r1
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bf _vRegTest1Error
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sts macl, r0
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mov #16, r1
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cmp/eq r0, r1
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bf _vRegTest1Error
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sts mach, r0
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mov #17, r1
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cmp/eq r0, r1
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bf _vRegTest1Error
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stc gbr, r0
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mov #18, r1
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cmp/eq r0, r1
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bf _vRegTest1Error
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; Increment the loop counter to indicate that this task is still running and
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; still healthy.
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mov.l #_ulRegTest1CycleCount, r0
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mov.l @r0, r1
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add #1, r1
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mov.l r1, @r0
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; Jump back to test all the registers again.
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bra _vRegTest1Loop
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nop
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;-----------------------------------------------------------
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_vRegTest1Error:
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bra _vRegTest1Error
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nop
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;-----------------------------------------------------------
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_vRegTest2Task:
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; Fill the standard registers with known values.
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mov #12, r1
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mov #13, r2
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mov #14, r3
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mov #15, r4
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mov #16, r5
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mov #17, r6
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mov #18, r7
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mov #19, r8
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mov #110, r9
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mov #111, r10
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mov #112, r11
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mov #113, r12
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mov #114, r13
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mov #115, r0
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lds r0, macl
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mov #116, r0
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lds r0, mach
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mov #117, r0
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ldc r0, gbr
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; Also fill the flop registers with known values.
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lds r1, fpul
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fsts fpul, fr1
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lds r2, fpul
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fsts fpul, fr2
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lds r3, fpul
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fsts fpul, fr3
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lds r4, fpul
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fsts fpul, fr4
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lds r5, fpul
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fsts fpul, fr5
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lds r6, fpul
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fsts fpul, fr6
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lds r7, fpul
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fsts fpul, fr7
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lds r8, fpul
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fsts fpul, fr8
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lds r9, fpul
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fsts fpul, fr9
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lds r10, fpul
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fsts fpul, fr10
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lds r11, fpul
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fsts fpul, fr11
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lds r12, fpul
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fsts fpul, fr12
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lds r13, fpul
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fsts fpul, fr13
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lds r14, fpul
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fsts fpul, fr14
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_vRegTest2Loop:
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; Reset r1 which was used in the tests.
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mov #12, r1
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; Test that the registers still contain the expected values. If not, jump to
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; vRegTestError, which will stop this function looping and so cause it to stop
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; incrementing its loop counter. Both the standard and flop registers are
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; checked.
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mov #12, r0
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cmp/eq r0, r1
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bf _vRegTest2Error
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flds fr1, fpul
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sts fpul, r1
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cmp/eq r0, r1
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bf _vRegTest2Error
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mov #13, r0
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cmp/eq r0, r2
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bf _vRegTest2Error
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flds fr2, fpul
|
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sts fpul, r1
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cmp/eq r0, r1
|
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bf _vRegTest2Error
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mov #14, r0
|
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cmp/eq r0, r3
|
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bf _vRegTest2Error
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flds fr3, fpul
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sts fpul, r1
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cmp/eq r0, r1
|
|
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|
bf _vRegTest2Error
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mov #15, r0
|
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cmp/eq r0, r4
|
|
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|
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bf _vRegTest2Error
|
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flds fr4, fpul
|
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sts fpul, r1
|
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cmp/eq r0, r1
|
|
|
|
|
bf _vRegTest2Error
|
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|
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mov #16, r0
|
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cmp/eq r0, r5
|
|
|
|
|
bf _vRegTest2Error
|
|
|
|
|
flds fr5, fpul
|
|
|
|
|
sts fpul, r1
|
|
|
|
|
cmp/eq r0, r1
|
|
|
|
|
bf _vRegTest2Error
|
|
|
|
|
|
|
|
|
|
mov #17, r0
|
|
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|
|
cmp/eq r0, r6
|
|
|
|
|
bf _vRegTest2Error
|
|
|
|
|
flds fr6, fpul
|
|
|
|
|
sts fpul, r1
|
|
|
|
|
cmp/eq r0, r1
|
|
|
|
|
bf _vRegTest2Error
|
|
|
|
|
|
|
|
|
|
mov #18, r0
|
|
|
|
|
cmp/eq r0, r7
|
|
|
|
|
bf _vRegTest2Error
|
|
|
|
|
flds fr7, fpul
|
|
|
|
|
sts fpul, r1
|
|
|
|
|
cmp/eq r0, r1
|
|
|
|
|
bf _vRegTest2Error
|
|
|
|
|
|
|
|
|
|
mov #19, r0
|
|
|
|
|
cmp/eq r0, r8
|
|
|
|
|
bf _vRegTest2Error
|
|
|
|
|
flds fr8, fpul
|
|
|
|
|
sts fpul, r1
|
|
|
|
|
cmp/eq r0, r1
|
|
|
|
|
bf _vRegTest2Error
|
|
|
|
|
|
|
|
|
|
mov #110, r0
|
|
|
|
|
cmp/eq r0, r9
|
|
|
|
|
bf _vRegTest2Error
|
|
|
|
|
flds fr9, fpul
|
|
|
|
|
sts fpul, r1
|
|
|
|
|
cmp/eq r0, r1
|
|
|
|
|
bf _vRegTest2Error
|
|
|
|
|
|
|
|
|
|
mov #111, r0
|
|
|
|
|
cmp/eq r0, r10
|
|
|
|
|
bf _vRegTest2Error
|
|
|
|
|
flds fr10, fpul
|
|
|
|
|
sts fpul, r1
|
|
|
|
|
cmp/eq r0, r1
|
|
|
|
|
bf _vRegTest2Error
|
|
|
|
|
|
|
|
|
|
mov #112, r0
|
|
|
|
|
cmp/eq r0, r11
|
|
|
|
|
bf _vRegTest2Error
|
|
|
|
|
flds fr11, fpul
|
|
|
|
|
sts fpul, r1
|
|
|
|
|
cmp/eq r0, r1
|
|
|
|
|
bf _vRegTest2Error
|
|
|
|
|
|
|
|
|
|
mov #113, r0
|
|
|
|
|
cmp/eq r0, r12
|
|
|
|
|
bf _vRegTest2Error
|
|
|
|
|
flds fr12, fpul
|
|
|
|
|
sts fpul, r1
|
|
|
|
|
cmp/eq r0, r1
|
|
|
|
|
bf _vRegTest2Error
|
|
|
|
|
|
|
|
|
|
mov #114, r0
|
|
|
|
|
cmp/eq r0, r13
|
|
|
|
|
bf _vRegTest2Error
|
|
|
|
|
flds fr13, fpul
|
|
|
|
|
sts fpul, r1
|
|
|
|
|
cmp/eq r0, r1
|
|
|
|
|
bf _vRegTest2Error
|
|
|
|
|
|
|
|
|
|
sts macl, r0
|
|
|
|
|
mov #115, r1
|
|
|
|
|
cmp/eq r0, r1
|
|
|
|
|
bf _vRegTest2Error
|
|
|
|
|
|
|
|
|
|
sts mach, r0
|
|
|
|
|
mov #116, r1
|
|
|
|
|
cmp/eq r0, r1
|
|
|
|
|
bf _vRegTest2Error
|
|
|
|
|
|
|
|
|
|
stc gbr, r0
|
|
|
|
|
mov #117, r1
|
|
|
|
|
cmp/eq r0, r1
|
|
|
|
|
bf _vRegTest2Error
|
|
|
|
|
|
|
|
|
|
; Increment the loop counter to indicate that this task is still running and
|
|
|
|
|
; still healthy.
|
|
|
|
|
mov.l #_ulRegTest2CycleCount, r0
|
|
|
|
|
mov.l @r0, r1
|
|
|
|
|
add #1, r1
|
|
|
|
|
mov.l r1, @r0
|
|
|
|
|
|
|
|
|
|
; Jump back to test all the registers again.
|
|
|
|
|
bra _vRegTest2Loop
|
|
|
|
|
nop
|
|
|
|
|
|
|
|
|
|
;-----------------------------------------------------------
|
|
|
|
|
|
|
|
|
|
_vRegTest2Error:
|
|
|
|
|
|
|
|
|
|
bra _vRegTest2Error
|
|
|
|
|
nop
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
.end
|
|
|
|
|
|
