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/*
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FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
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All rights reserved
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VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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This file is part of the FreeRTOS distribution.
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FreeRTOS is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License (version 2) as published by the
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Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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***************************************************************************
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>>! NOTE: The modification to the GPL is included to allow you to !<<
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>>! distribute a combined work that includes FreeRTOS without being !<<
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>>! obliged to provide the source code for proprietary components !<<
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>>! outside of the FreeRTOS kernel. !<<
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***************************************************************************
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FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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FOR A PARTICULAR PURPOSE. Full license text is available on the following
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link: http://www.freertos.org/a00114.html
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***************************************************************************
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* *
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* FreeRTOS provides completely free yet professionally developed, *
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* robust, strictly quality controlled, supported, and cross *
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* platform software that is more than just the market leader, it *
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* is the industry's de facto standard. *
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* *
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* Help yourself get started quickly while simultaneously helping *
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* to support the FreeRTOS project by purchasing a FreeRTOS *
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* tutorial book, reference manual, or both: *
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* http://www.FreeRTOS.org/Documentation *
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* *
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***************************************************************************
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http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
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the FAQ page "My application does not run, what could be wrong?". Have you
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defined configASSERT()?
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http://www.FreeRTOS.org/support - In return for receiving this top quality
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embedded software for free we request you assist our global community by
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participating in the support forum.
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http://www.FreeRTOS.org/training - Investing in training allows your team to
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be as productive as possible as early as possible. Now you can receive
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FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
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Ltd, and the world's leading authority on the world's leading RTOS.
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http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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compatible FAT file system, and our tiny thread aware UDP/IP stack.
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http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
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http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
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Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
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licenses offer ticketed support, indemnification and commercial middleware.
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http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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engineered and independently SIL3 certified version for use in safety and
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mission critical applications that require provable dependability.
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1 tab == 4 spaces!
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*/
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#include <FreeRTOSConfig.h>
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RSEG CODE:CODE(2)
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thumb
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EXTERN ulRegTest1LoopCounter
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EXTERN ulRegTest2LoopCounter
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PUBLIC vRegTest1Task
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PUBLIC vRegTest2Task
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PUBLIC vRegTestClearFlopRegistersToParameterValue
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PUBLIC ulRegTestCheckFlopRegistersContainParameterValue
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/*-----------------------------------------------------------*/
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vRegTest1Task
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/* Fill the core registers with known values. */
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mov r0, #100
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mov r1, #101
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mov r2, #102
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mov r3, #103
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mov r4, #104
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mov r5, #105
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mov r6, #106
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mov r7, #107
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mov r8, #108
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mov r9, #109
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mov r10, #110
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mov r11, #111
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mov r12, #112
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/* Fill the VFP registers with known values. */
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vmov d0, r0, r1
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vmov d1, r2, r3
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vmov d2, r4, r5
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vmov d3, r6, r7
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vmov d4, r8, r9
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vmov d5, r10, r11
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vmov d6, r0, r1
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vmov d7, r2, r3
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vmov d8, r4, r5
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vmov d9, r6, r7
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vmov d10, r8, r9
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vmov d11, r10, r11
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vmov d12, r0, r1
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vmov d13, r2, r3
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vmov d14, r4, r5
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vmov d15, r6, r7
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reg1_loop:
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/* Check all the VFP registers still contain the values set above.
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First save registers that are clobbered by the test. */
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push { r0-r1 }
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vmov r0, r1, d0
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cmp r0, #100
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bne reg1_error_loopf
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cmp r1, #101
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bne reg1_error_loopf
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vmov r0, r1, d1
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cmp r0, #102
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bne reg1_error_loopf
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cmp r1, #103
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bne reg1_error_loopf
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vmov r0, r1, d2
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cmp r0, #104
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bne reg1_error_loopf
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cmp r1, #105
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bne reg1_error_loopf
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vmov r0, r1, d3
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cmp r0, #106
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bne reg1_error_loopf
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cmp r1, #107
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bne reg1_error_loopf
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vmov r0, r1, d4
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cmp r0, #108
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bne reg1_error_loopf
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cmp r1, #109
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bne reg1_error_loopf
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vmov r0, r1, d5
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cmp r0, #110
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bne reg1_error_loopf
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cmp r1, #111
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bne reg1_error_loopf
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vmov r0, r1, d6
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cmp r0, #100
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bne reg1_error_loopf
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cmp r1, #101
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bne reg1_error_loopf
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vmov r0, r1, d7
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cmp r0, #102
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bne reg1_error_loopf
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cmp r1, #103
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bne reg1_error_loopf
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vmov r0, r1, d8
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cmp r0, #104
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bne reg1_error_loopf
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cmp r1, #105
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bne reg1_error_loopf
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vmov r0, r1, d9
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cmp r0, #106
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bne reg1_error_loopf
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cmp r1, #107
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bne reg1_error_loopf
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vmov r0, r1, d10
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cmp r0, #108
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bne reg1_error_loopf
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cmp r1, #109
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bne reg1_error_loopf
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vmov r0, r1, d11
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cmp r0, #110
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bne reg1_error_loopf
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cmp r1, #111
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bne reg1_error_loopf
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vmov r0, r1, d12
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cmp r0, #100
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bne reg1_error_loopf
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cmp r1, #101
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bne reg1_error_loopf
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vmov r0, r1, d13
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cmp r0, #102
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bne reg1_error_loopf
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cmp r1, #103
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bne reg1_error_loopf
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vmov r0, r1, d14
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cmp r0, #104
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bne reg1_error_loopf
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cmp r1, #105
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bne reg1_error_loopf
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vmov r0, r1, d15
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cmp r0, #106
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bne reg1_error_loopf
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cmp r1, #107
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bne reg1_error_loopf
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/* Restore the registers that were clobbered by the test. */
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pop {r0-r1}
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/* VFP register test passed. Jump to the core register test. */
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b reg1_loopf_pass
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reg1_error_loopf
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/* If this line is hit then a VFP register value was found to be
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incorrect. */
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b reg1_error_loopf
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reg1_loopf_pass
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cmp r0, #100
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bne reg1_error_loop
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cmp r1, #101
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bne reg1_error_loop
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cmp r2, #102
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bne reg1_error_loop
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cmp r3, #103
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bne reg1_error_loop
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cmp r4, #104
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bne reg1_error_loop
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cmp r5, #105
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bne reg1_error_loop
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cmp r6, #106
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bne reg1_error_loop
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cmp r7, #107
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bne reg1_error_loop
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cmp r8, #108
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bne reg1_error_loop
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cmp r9, #109
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bne reg1_error_loop
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cmp r10, #110
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bne reg1_error_loop
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cmp r11, #111
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bne reg1_error_loop
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cmp r12, #112
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bne reg1_error_loop
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/* Everything passed, increment the loop counter. */
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push { r0-r1 }
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ldr r0, =ulRegTest1LoopCounter
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ldr r1, [r0]
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adds r1, r1, #1
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str r1, [r0]
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pop { r0-r1 }
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/* Start again. */
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b reg1_loop
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reg1_error_loop:
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/* If this line is hit then there was an error in a core register value.
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The loop ensures the loop counter stops incrementing. */
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b reg1_error_loop
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/*-----------------------------------------------------------*/
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vRegTest2Task
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/* Set all the core registers to known values. */
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mov r0, #-1
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mov r1, #1
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mov r2, #2
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mov r3, #3
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mov r4, #4
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mov r5, #5
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mov r6, #6
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mov r7, #7
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mov r8, #8
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mov r9, #9
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mov r10, #10
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mov r11, #11
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mov r12, #12
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/* Set all the VFP to known values. */
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vmov d0, r0, r1
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vmov d1, r2, r3
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vmov d2, r4, r5
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vmov d3, r6, r7
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vmov d4, r8, r9
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vmov d5, r10, r11
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vmov d6, r0, r1
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vmov d7, r2, r3
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vmov d8, r4, r5
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vmov d9, r6, r7
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vmov d10, r8, r9
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vmov d11, r10, r11
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vmov d12, r0, r1
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vmov d13, r2, r3
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vmov d14, r4, r5
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vmov d15, r6, r7
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reg2_loop:
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/* Check all the VFP registers still contain the values set above.
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First save registers that are clobbered by the test. */
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push { r0-r1 }
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vmov r0, r1, d0
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cmp r0, #-1
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bne reg2_error_loopf
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cmp r1, #1
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bne reg2_error_loopf
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vmov r0, r1, d1
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cmp r0, #2
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bne reg2_error_loopf
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cmp r1, #3
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bne reg2_error_loopf
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vmov r0, r1, d2
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cmp r0, #4
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bne reg2_error_loopf
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cmp r1, #5
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bne reg2_error_loopf
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vmov r0, r1, d3
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cmp r0, #6
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bne reg2_error_loopf
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cmp r1, #7
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bne reg2_error_loopf
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vmov r0, r1, d4
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cmp r0, #8
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bne reg2_error_loopf
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cmp r1, #9
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bne reg2_error_loopf
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vmov r0, r1, d5
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cmp r0, #10
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bne reg2_error_loopf
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cmp r1, #11
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bne reg2_error_loopf
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vmov r0, r1, d6
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cmp r0, #-1
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bne reg2_error_loopf
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cmp r1, #1
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bne reg2_error_loopf
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vmov r0, r1, d7
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cmp r0, #2
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bne reg2_error_loopf
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cmp r1, #3
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bne reg2_error_loopf
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vmov r0, r1, d8
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cmp r0, #4
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bne reg2_error_loopf
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cmp r1, #5
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bne reg2_error_loopf
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vmov r0, r1, d9
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cmp r0, #6
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bne reg2_error_loopf
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cmp r1, #7
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bne reg2_error_loopf
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vmov r0, r1, d10
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cmp r0, #8
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bne reg2_error_loopf
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cmp r1, #9
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bne reg2_error_loopf
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vmov r0, r1, d11
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cmp r0, #10
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bne reg2_error_loopf
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cmp r1, #11
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bne reg2_error_loopf
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vmov r0, r1, d12
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cmp r0, #-1
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bne reg2_error_loopf
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cmp r1, #1
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bne reg2_error_loopf
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vmov r0, r1, d13
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cmp r0, #2
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bne reg2_error_loopf
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cmp r1, #3
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bne reg2_error_loopf
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vmov r0, r1, d14
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|
cmp r0, #4
|
|
|
|
bne reg2_error_loopf
|
|
|
|
cmp r1, #5
|
|
|
|
bne reg2_error_loopf
|
|
|
|
vmov r0, r1, d15
|
|
|
|
cmp r0, #6
|
|
|
|
bne reg2_error_loopf
|
|
|
|
cmp r1, #7
|
|
|
|
bne reg2_error_loopf
|
|
|
|
|
|
|
|
/* Restore the registers that were clobbered by the test. */
|
|
|
|
pop {r0-r1}
|
|
|
|
|
|
|
|
/* VFP register test passed. Jump to the core register test. */
|
|
|
|
b reg2_loopf_pass
|
|
|
|
|
|
|
|
reg2_error_loopf
|
|
|
|
/* If this line is hit then a VFP register value was found to be
|
|
|
|
incorrect. */
|
|
|
|
b reg2_error_loopf
|
|
|
|
|
|
|
|
reg2_loopf_pass
|
|
|
|
|
|
|
|
cmp r0, #-1
|
|
|
|
bne reg2_error_loop
|
|
|
|
cmp r1, #1
|
|
|
|
bne reg2_error_loop
|
|
|
|
cmp r2, #2
|
|
|
|
bne reg2_error_loop
|
|
|
|
cmp r3, #3
|
|
|
|
bne reg2_error_loop
|
|
|
|
cmp r4, #4
|
|
|
|
bne reg2_error_loop
|
|
|
|
cmp r5, #5
|
|
|
|
bne reg2_error_loop
|
|
|
|
cmp r6, #6
|
|
|
|
bne reg2_error_loop
|
|
|
|
cmp r7, #7
|
|
|
|
bne reg2_error_loop
|
|
|
|
cmp r8, #8
|
|
|
|
bne reg2_error_loop
|
|
|
|
cmp r9, #9
|
|
|
|
bne reg2_error_loop
|
|
|
|
cmp r10, #10
|
|
|
|
bne reg2_error_loop
|
|
|
|
cmp r11, #11
|
|
|
|
bne reg2_error_loop
|
|
|
|
cmp r12, #12
|
|
|
|
bne reg2_error_loop
|
|
|
|
|
|
|
|
/* Increment the loop counter to indicate this test is still functioning
|
|
|
|
correctly. */
|
|
|
|
push { r0-r1 }
|
|
|
|
ldr r0, =ulRegTest2LoopCounter
|
|
|
|
ldr r1, [r0]
|
|
|
|
adds r1, r1, #1
|
|
|
|
str r1, [r0]
|
|
|
|
pop { r0-r1 }
|
|
|
|
|
|
|
|
/* Start again. */
|
|
|
|
b reg2_loop
|
|
|
|
|
|
|
|
reg2_error_loop:
|
|
|
|
/* If this line is hit then there was an error in a core register value.
|
|
|
|
This loop ensures the loop counter variable stops incrementing. */
|
|
|
|
b reg2_error_loop
|
|
|
|
|
|
|
|
/*-----------------------------------------------------------*/
|
|
|
|
|
|
|
|
vRegTestClearFlopRegistersToParameterValue
|
|
|
|
|
|
|
|
/* Clobber the auto saved registers. */
|
|
|
|
vmov d0, r0, r0
|
|
|
|
vmov d1, r0, r0
|
|
|
|
vmov d2, r0, r0
|
|
|
|
vmov d3, r0, r0
|
|
|
|
vmov d4, r0, r0
|
|
|
|
vmov d5, r0, r0
|
|
|
|
vmov d6, r0, r0
|
|
|
|
vmov d7, r0, r0
|
|
|
|
bx lr
|
|
|
|
|
|
|
|
/*-----------------------------------------------------------*/
|
|
|
|
|
|
|
|
ulRegTestCheckFlopRegistersContainParameterValue
|
|
|
|
|
|
|
|
vmov r1, s0
|
|
|
|
cmp r0, r1
|
|
|
|
bne return_error
|
|
|
|
vmov r1, s1
|
|
|
|
cmp r0, r1
|
|
|
|
bne return_error
|
|
|
|
vmov r1, s2
|
|
|
|
cmp r0, r1
|
|
|
|
bne return_error
|
|
|
|
vmov r1, s3
|
|
|
|
cmp r0, r1
|
|
|
|
bne return_error
|
|
|
|
vmov r1, s4
|
|
|
|
cmp r0, r1
|
|
|
|
bne return_error
|
|
|
|
vmov r1, s5
|
|
|
|
cmp r0, r1
|
|
|
|
bne return_error
|
|
|
|
vmov r1, s6
|
|
|
|
cmp r0, r1
|
|
|
|
bne return_error
|
|
|
|
vmov r1, s7
|
|
|
|
cmp r0, r1
|
|
|
|
bne return_error
|
|
|
|
vmov r1, s8
|
|
|
|
cmp r0, r1
|
|
|
|
bne return_error
|
|
|
|
vmov r1, s9
|
|
|
|
cmp r0, r1
|
|
|
|
bne return_error
|
|
|
|
vmov r1, s10
|
|
|
|
cmp r0, r1
|
|
|
|
bne return_error
|
|
|
|
vmov r1, s11
|
|
|
|
cmp r0, r1
|
|
|
|
bne return_error
|
|
|
|
vmov r1, s12
|
|
|
|
cmp r0, r1
|
|
|
|
bne return_error
|
|
|
|
vmov r1, s13
|
|
|
|
cmp r0, r1
|
|
|
|
bne return_error
|
|
|
|
vmov r1, s14
|
|
|
|
cmp r0, r1
|
|
|
|
bne return_error
|
|
|
|
vmov r1, s15
|
|
|
|
cmp r0, r1
|
|
|
|
bne return_error
|
|
|
|
|
|
|
|
return_pass
|
|
|
|
mov r0, #1
|
|
|
|
bx lr
|
|
|
|
|
|
|
|
return_error
|
|
|
|
mov r0, #0
|
|
|
|
bx lr
|
|
|
|
|
|
|
|
END
|
|
|
|
|