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39 lines
982 B
Plaintext
39 lines
982 B
Plaintext
14 years ago
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#Please do not modify this file by hand
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XmpVersion: 13.1
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VerMgmt: 13.1
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IntStyle: default
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MHS File: system.mhs
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Architecture: spartan6
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Device: xc6slx45t
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Package: fgg484
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SpeedGrade: -3
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UserCmd1:
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UserCmd1Type: 0
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UserCmd2:
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UserCmd2Type: 0
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GenSimTB: 0
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SdkExportBmmBit: 1
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SdkExportDir: SDK/SDK_Export
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InsertNoPads: 0
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WarnForEAArch: 1
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HdlLang: VHDL
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SimModel: BEHAVIORAL
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UcfFile: data/system.ucf
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EnableParTimingError: 1
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ShowLicenseDialog: 1
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ICacheAddr: MCB_DDR3,C_S0_AXI_BASEADDR
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ICacheAddr: MCB_DDR3,C_S1_AXI_BASEADDR
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ICacheAddr: MCB_DDR3,C_S2_AXI_BASEADDR
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ICacheAddr: MCB_DDR3,C_S3_AXI_BASEADDR
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ICacheAddr: MCB_DDR3,C_S4_AXI_BASEADDR
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ICacheAddr: MCB_DDR3,C_S5_AXI_BASEADDR
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DCacheAddr: MCB_DDR3,C_S0_AXI_BASEADDR
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DCacheAddr: MCB_DDR3,C_S1_AXI_BASEADDR
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DCacheAddr: MCB_DDR3,C_S2_AXI_BASEADDR
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DCacheAddr: MCB_DDR3,C_S3_AXI_BASEADDR
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DCacheAddr: MCB_DDR3,C_S4_AXI_BASEADDR
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DCacheAddr: MCB_DDR3,C_S5_AXI_BASEADDR
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Processor: microblaze_0
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ElfImp:
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ElfSim:
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