FreeRTOS-Kernel/portable/GCC/ARM_CA53_64_BIT/README.md

# ARM_CA53_64_BIT port

Initial port to support Armv8-A architecture in FreeRTOS kernel was written for
Arm Cortex-A53 processor.

* ARM_CA53_64_BIT
    * Memory mapped interface to access Arm GIC registers

This port is generic and can be used as a starting point for other Armv8-A
application processors. Therefore, the port `ARM_CA53_64_BIT` is renamed as
`ARM_AARCH64`. The existing projects that use old port `ARM_CA53_64_BIT`,
should migrate to renamed port `ARM_AARCH64`.

**NOTE**

This port uses memory mapped interface to access Arm GIC registers.
aarch64: Rename ARM_CA53_64_BIT/_SRE to Arm_AARCH64/_SRE (#822) The Cortex-A53 ports are generic and can be used as a starting point for other Armv8-A application processors. Therefore, rename `ARM_CA53_64_BIT` to `Arm_AARCH64` and `ARM_CA53_64_BIT_SRE` to `Arm_AARCH64_SRE`. With this renaming, existing projects that use old port, should migrate to renamed port as follows: * `ARM_CA53_64_BIT` -> `Arm_AARCH64` * `ARM_CA53_64_BIT_SRE` -> `Arm_AARCH64_SRE` Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> 1 year ago			`# ARM_CA53_64_BIT port`

			`Initial port to support Armv8-A architecture in FreeRTOS kernel was written for`
			`Arm Cortex-A53 processor.`

			`* ARM_CA53_64_BIT`
fix typos in comments: interace -> interface, swtich -> switch (#1022) Fix typos in comments: interace -> interface, swtich -> switch. Signed-off-by: Florian La Roche <Florian.LaRoche@gmail.com> 11 months ago			`* Memory mapped interface to access Arm GIC registers`
aarch64: Rename ARM_CA53_64_BIT/_SRE to Arm_AARCH64/_SRE (#822) The Cortex-A53 ports are generic and can be used as a starting point for other Armv8-A application processors. Therefore, rename `ARM_CA53_64_BIT` to `Arm_AARCH64` and `ARM_CA53_64_BIT_SRE` to `Arm_AARCH64_SRE`. With this renaming, existing projects that use old port, should migrate to renamed port as follows: * `ARM_CA53_64_BIT` -> `Arm_AARCH64` * `ARM_CA53_64_BIT_SRE` -> `Arm_AARCH64_SRE` Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> 1 year ago
			`This port is generic and can be used as a starting point for other Armv8-A`
			application processors. Therefore, the port `ARM_CA53_64_BIT` is renamed as
Correct ARM port folder capitalization (#981) * Rename Arm_AARCH64 to ARM_AARCH64 * Rename Arm_AARCH64_SRE to ARM_AARCH64_SRE * Update cmake for ARM port folder capitalization * Update in portable/CmakeLists.txt * Use capitalization name in port README.md --------- Co-authored-by: Ching-Hsin Lee <chinglee@amazon.com> 1 year ago			`ARM_AARCH64`. The existing projects that use old port `ARM_CA53_64_BIT`,
			should migrate to renamed port `ARM_AARCH64`.
aarch64: Rename ARM_CA53_64_BIT/_SRE to Arm_AARCH64/_SRE (#822) The Cortex-A53 ports are generic and can be used as a starting point for other Armv8-A application processors. Therefore, rename `ARM_CA53_64_BIT` to `Arm_AARCH64` and `ARM_CA53_64_BIT_SRE` to `Arm_AARCH64_SRE`. With this renaming, existing projects that use old port, should migrate to renamed port as follows: * `ARM_CA53_64_BIT` -> `Arm_AARCH64` * `ARM_CA53_64_BIT_SRE` -> `Arm_AARCH64_SRE` Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> 1 year ago
			`NOTE`

fix typos in comments: interace -> interface, swtich -> switch (#1022) Fix typos in comments: interace -> interface, swtich -> switch. Signed-off-by: Florian La Roche <Florian.LaRoche@gmail.com> 11 months ago			`This port uses memory mapped interface to access Arm GIC registers.`