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FreeRTOS-Kernel/Demo/MicroBlaze_Spartan-6_Ethernet/HardwareWithEthernet/system_bd.bmm

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Create project directory structure for the MicroBlaze demo project that uses the full Ethernet IP (rather than the Ethernet Lite IP).
14 years ago
// BMM LOC annotation file.
//
// Release 13.2 - Data2MEM O.61xd, build 2.2 May 20, 2011
// Copyright (c) 1995-2011 Xilinx, Inc. All rights reserved.
///////////////////////////////////////////////////////////////////////////////
//
// Processor 'microblaze_0', ID 100, memory map.
//
///////////////////////////////////////////////////////////////////////////////
ADDRESS_MAP microblaze_0 MICROBLAZE-LE 100
///////////////////////////////////////////////////////////////////////////////
//
// Processor 'microblaze_0' address space 'lmb_bram_combined' 0x00000000:0x0000FFFF (64 KBytes).
//
///////////////////////////////////////////////////////////////////////////////
ADDRESS_SPACE lmb_bram_combined RAMB16 [0x00000000:0x0000FFFF]
BUS_BLOCK
system_i/lmb_bram/lmb_bram/ramb16bwer_0 [31:31] INPUT = lmb_bram_combined_0.mem PLACED = X2Y30;
system_i/lmb_bram/lmb_bram/ramb16bwer_1 [30:30] INPUT = lmb_bram_combined_1.mem PLACED = X2Y28;
system_i/lmb_bram/lmb_bram/ramb16bwer_2 [29:29] INPUT = lmb_bram_combined_2.mem PLACED = X3Y22;
system_i/lmb_bram/lmb_bram/ramb16bwer_3 [28:28] INPUT = lmb_bram_combined_3.mem PLACED = X3Y20;
system_i/lmb_bram/lmb_bram/ramb16bwer_4 [27:27] INPUT = lmb_bram_combined_4.mem PLACED = X3Y30;
system_i/lmb_bram/lmb_bram/ramb16bwer_5 [26:26] INPUT = lmb_bram_combined_5.mem PLACED = X2Y26;
system_i/lmb_bram/lmb_bram/ramb16bwer_6 [25:25] INPUT = lmb_bram_combined_6.mem PLACED = X2Y18;
system_i/lmb_bram/lmb_bram/ramb16bwer_7 [24:24] INPUT = lmb_bram_combined_7.mem PLACED = X2Y20;
system_i/lmb_bram/lmb_bram/ramb16bwer_8 [23:23] INPUT = lmb_bram_combined_8.mem PLACED = X3Y28;
system_i/lmb_bram/lmb_bram/ramb16bwer_9 [22:22] INPUT = lmb_bram_combined_9.mem PLACED = X3Y26;
system_i/lmb_bram/lmb_bram/ramb16bwer_10 [21:21] INPUT = lmb_bram_combined_10.mem PLACED = X3Y24;
system_i/lmb_bram/lmb_bram/ramb16bwer_11 [20:20] INPUT = lmb_bram_combined_11.mem PLACED = X2Y10;
system_i/lmb_bram/lmb_bram/ramb16bwer_12 [19:19] INPUT = lmb_bram_combined_12.mem PLACED = X2Y12;
system_i/lmb_bram/lmb_bram/ramb16bwer_13 [18:18] INPUT = lmb_bram_combined_13.mem PLACED = X2Y24;
system_i/lmb_bram/lmb_bram/ramb16bwer_14 [17:17] INPUT = lmb_bram_combined_14.mem PLACED = X2Y16;
system_i/lmb_bram/lmb_bram/ramb16bwer_15 [16:16] INPUT = lmb_bram_combined_15.mem PLACED = X2Y14;
system_i/lmb_bram/lmb_bram/ramb16bwer_16 [15:15] INPUT = lmb_bram_combined_16.mem PLACED = X1Y22;
system_i/lmb_bram/lmb_bram/ramb16bwer_17 [14:14] INPUT = lmb_bram_combined_17.mem PLACED = X1Y24;
system_i/lmb_bram/lmb_bram/ramb16bwer_18 [13:13] INPUT = lmb_bram_combined_18.mem PLACED = X1Y30;
system_i/lmb_bram/lmb_bram/ramb16bwer_19 [12:12] INPUT = lmb_bram_combined_19.mem PLACED = X1Y28;
system_i/lmb_bram/lmb_bram/ramb16bwer_20 [11:11] INPUT = lmb_bram_combined_20.mem PLACED = X0Y22;
system_i/lmb_bram/lmb_bram/ramb16bwer_21 [10:10] INPUT = lmb_bram_combined_21.mem PLACED = X0Y20;
system_i/lmb_bram/lmb_bram/ramb16bwer_22 [9:9] INPUT = lmb_bram_combined_22.mem PLACED = X0Y16;
system_i/lmb_bram/lmb_bram/ramb16bwer_23 [8:8] INPUT = lmb_bram_combined_23.mem PLACED = X0Y28;
system_i/lmb_bram/lmb_bram/ramb16bwer_24 [7:7] INPUT = lmb_bram_combined_24.mem PLACED = X1Y26;
system_i/lmb_bram/lmb_bram/ramb16bwer_25 [6:6] INPUT = lmb_bram_combined_25.mem PLACED = X0Y26;
system_i/lmb_bram/lmb_bram/ramb16bwer_26 [5:5] INPUT = lmb_bram_combined_26.mem PLACED = X0Y24;
system_i/lmb_bram/lmb_bram/ramb16bwer_27 [4:4] INPUT = lmb_bram_combined_27.mem PLACED = X1Y20;
system_i/lmb_bram/lmb_bram/ramb16bwer_28 [3:3] INPUT = lmb_bram_combined_28.mem PLACED = X1Y14;
system_i/lmb_bram/lmb_bram/ramb16bwer_29 [2:2] INPUT = lmb_bram_combined_29.mem PLACED = X1Y18;
system_i/lmb_bram/lmb_bram/ramb16bwer_30 [1:1] INPUT = lmb_bram_combined_30.mem PLACED = X1Y16;
system_i/lmb_bram/lmb_bram/ramb16bwer_31 [0:0] INPUT = lmb_bram_combined_31.mem PLACED = X0Y18;
END_BUS_BLOCK;
END_ADDRESS_SPACE;
///////////////////////////////////////////////////////////////////////////////
//
// Processor 'microblaze_0' address space 'axi_bram_0_combined' 0x4A000000:0x4A00FFFF (64 KBytes).
//
///////////////////////////////////////////////////////////////////////////////
ADDRESS_SPACE axi_bram_0_combined RAMB16 [0x4A000000:0x4A00FFFF]
BUS_BLOCK
system_i/axi_bram_0/axi_bram_0/ramb16bwer_0 [31:31] INPUT = axi_bram_0_combined_0.mem PLACED = X2Y54;
system_i/axi_bram_0/axi_bram_0/ramb16bwer_1 [30:30] INPUT = axi_bram_0_combined_1.mem PLACED = X2Y50;
system_i/axi_bram_0/axi_bram_0/ramb16bwer_2 [29:29] INPUT = axi_bram_0_combined_2.mem PLACED = X3Y52;
system_i/axi_bram_0/axi_bram_0/ramb16bwer_3 [28:28] INPUT = axi_bram_0_combined_3.mem PLACED = X2Y52;
system_i/axi_bram_0/axi_bram_0/ramb16bwer_4 [27:27] INPUT = axi_bram_0_combined_4.mem PLACED = X3Y46;
system_i/axi_bram_0/axi_bram_0/ramb16bwer_5 [26:26] INPUT = axi_bram_0_combined_5.mem PLACED = X2Y48;
system_i/axi_bram_0/axi_bram_0/ramb16bwer_6 [25:25] INPUT = axi_bram_0_combined_6.mem PLACED = X3Y48;
system_i/axi_bram_0/axi_bram_0/ramb16bwer_7 [24:24] INPUT = axi_bram_0_combined_7.mem PLACED = X3Y50;
system_i/axi_bram_0/axi_bram_0/ramb16bwer_8 [23:23] INPUT = axi_bram_0_combined_8.mem PLACED = X3Y42;
system_i/axi_bram_0/axi_bram_0/ramb16bwer_9 [22:22] INPUT = axi_bram_0_combined_9.mem PLACED = X3Y44;
system_i/axi_bram_0/axi_bram_0/ramb16bwer_10 [21:21] INPUT = axi_bram_0_combined_10.mem PLACED = X2Y44;
system_i/axi_bram_0/axi_bram_0/ramb16bwer_11 [20:20] INPUT = axi_bram_0_combined_11.mem PLACED = X2Y42;
system_i/axi_bram_0/axi_bram_0/ramb16bwer_12 [19:19] INPUT = axi_bram_0_combined_12.mem PLACED = X3Y38;
system_i/axi_bram_0/axi_bram_0/ramb16bwer_13 [18:18] INPUT = axi_bram_0_combined_13.mem PLACED = X3Y40;
system_i/axi_bram_0/axi_bram_0/ramb16bwer_14 [17:17] INPUT = axi_bram_0_combined_14.mem PLACED = X3Y36;
system_i/axi_bram_0/axi_bram_0/ramb16bwer_15 [16:16] INPUT = axi_bram_0_combined_15.mem PLACED = X3Y34;
system_i/axi_bram_0/axi_bram_0/ramb16bwer_16 [15:15] INPUT = axi_bram_0_combined_16.mem PLACED = X2Y36;
system_i/axi_bram_0/axi_bram_0/ramb16bwer_17 [14:14] INPUT = axi_bram_0_combined_17.mem PLACED = X1Y40;
system_i/axi_bram_0/axi_bram_0/ramb16bwer_18 [13:13] INPUT = axi_bram_0_combined_18.mem PLACED = X2Y40;
system_i/axi_bram_0/axi_bram_0/ramb16bwer_19 [12:12] INPUT = axi_bram_0_combined_19.mem PLACED = X2Y38;
system_i/axi_bram_0/axi_bram_0/ramb16bwer_20 [11:11] INPUT = axi_bram_0_combined_20.mem PLACED = X1Y38;
system_i/axi_bram_0/axi_bram_0/ramb16bwer_21 [10:10] INPUT = axi_bram_0_combined_21.mem PLACED = X0Y32;
system_i/axi_bram_0/axi_bram_0/ramb16bwer_22 [9:9] INPUT = axi_bram_0_combined_22.mem PLACED = X0Y34;
system_i/axi_bram_0/axi_bram_0/ramb16bwer_23 [8:8] INPUT = axi_bram_0_combined_23.mem PLACED = X1Y36;
system_i/axi_bram_0/axi_bram_0/ramb16bwer_24 [7:7] INPUT = axi_bram_0_combined_24.mem PLACED = X0Y36;
system_i/axi_bram_0/axi_bram_0/ramb16bwer_25 [6:6] INPUT = axi_bram_0_combined_25.mem PLACED = X1Y42;
system_i/axi_bram_0/axi_bram_0/ramb16bwer_26 [5:5] INPUT = axi_bram_0_combined_26.mem PLACED = X0Y38;
system_i/axi_bram_0/axi_bram_0/ramb16bwer_27 [4:4] INPUT = axi_bram_0_combined_27.mem PLACED = X0Y40;
system_i/axi_bram_0/axi_bram_0/ramb16bwer_28 [3:3] INPUT = axi_bram_0_combined_28.mem PLACED = X0Y46;
system_i/axi_bram_0/axi_bram_0/ramb16bwer_29 [2:2] INPUT = axi_bram_0_combined_29.mem PLACED = X1Y46;
system_i/axi_bram_0/axi_bram_0/ramb16bwer_30 [1:1] INPUT = axi_bram_0_combined_30.mem PLACED = X1Y44;
system_i/axi_bram_0/axi_bram_0/ramb16bwer_31 [0:0] INPUT = axi_bram_0_combined_31.mem PLACED = X0Y44;
END_BUS_BLOCK;
END_ADDRESS_SPACE;
END_ADDRESS_MAP;