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/*
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FreeRTOS V7.1.0 - Copyright (C) 2011 Real Time Engineers Ltd.
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***************************************************************************
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* *
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* FreeRTOS tutorial books are available in pdf and paperback. *
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* Complete, revised, and edited pdf reference manuals are also *
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* available. *
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* *
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* Purchasing FreeRTOS documentation will not only help you, by *
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* ensuring you get running as quickly as possible and with an *
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* in-depth knowledge of how to use FreeRTOS, it will also help *
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* the FreeRTOS project to continue with its mission of providing *
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* professional grade, cross platform, de facto standard solutions *
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* for microcontrollers - completely free of charge! *
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* *
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* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
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* *
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* Thank you for using FreeRTOS, and thank you for your support! *
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* *
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***************************************************************************
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This file is part of the FreeRTOS distribution.
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FreeRTOS is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License (version 2) as published by the
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Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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>>>NOTE<<< The modification to the GPL is included to allow you to
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distribute a combined work that includes FreeRTOS without being obliged to
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provide the source code for proprietary components outside of the FreeRTOS
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kernel. FreeRTOS is distributed in the hope that it will be useful, but
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WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details. You should have received a copy of the GNU General Public
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License and the FreeRTOS license exception along with FreeRTOS; if not it
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can be viewed here: http://www.freertos.org/a00114.html and also obtained
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by writing to Richard Barry, contact details for whom are available on the
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FreeRTOS WEB site.
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1 tab == 4 spaces!
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http://www.FreeRTOS.org - Documentation, latest information, license and
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contact details.
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http://www.SafeRTOS.com - A version that is certified for use in safety
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critical systems.
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http://www.OpenRTOS.com - Commercial support, development, porting,
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licensing and training services.
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*/
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/*-----------------------------------------------------------
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* Implementation of functions defined in portable.h for the PIC32MX port.
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*----------------------------------------------------------*/
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/* Scheduler include files. */
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#include "FreeRTOS.h"
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#include "task.h"
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/* Hardware specifics. */
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#define portTIMER_PRESCALE 8
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/* Bits within various registers. */
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#define portIE_BIT ( 0x00000001 )
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#define portEXL_BIT ( 0x00000002 )
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/* The EXL bit is set to ensure interrupts do not occur while the context of
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the first task is being restored. */
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#define portINITIAL_SR ( portIE_BIT | portEXL_BIT )
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/* Records the interrupt nesting depth. This starts at one as it will be
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decremented to 0 when the first task starts. */
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volatile unsigned portBASE_TYPE uxInterruptNesting = 0x01;
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/* Stores the task stack pointer when a switch is made to use the system stack. */
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unsigned portBASE_TYPE uxSavedTaskStackPointer = 0;
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/* The stack used by interrupt service routines that cause a context switch. */
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portSTACK_TYPE xISRStack[ configISR_STACK_SIZE ] = { 0 };
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/* The top of stack value ensures there is enough space to store 6 registers on
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the callers stack, as some functions seem to want to do this. */
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const portSTACK_TYPE * const xISRStackTop = &( xISRStack[ configISR_STACK_SIZE - 7 ] );
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/*
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* Place the prototype here to ensure the interrupt vector is correctly installed.
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* Note that because the interrupt is written in assembly, the IPL setting in the
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* following line of code has no effect. The interrupt priority is set by the
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* call to ConfigIntTimer1() in prvSetupTimerInterrupt().
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*/
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extern void __attribute__( (interrupt(ipl1), vector(_TIMER_1_VECTOR))) vT1InterruptHandler( void );
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/*
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* The software interrupt handler that performs the yield. Note that, because
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* the interrupt is written in assembly, the IPL setting in the following line of
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* code has no effect. The interrupt priority is set by the call to
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* mConfigIntCoreSW0() in xPortStartScheduler().
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*/
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void __attribute__( (interrupt(ipl1), vector(_CORE_SOFTWARE_0_VECTOR))) vPortYieldISR( void );
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/*-----------------------------------------------------------*/
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/*
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* See header file for description.
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*/
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portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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{
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/* Ensure byte alignment is maintained when leaving this function. */
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pxTopOfStack--;
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*pxTopOfStack = (portSTACK_TYPE) 0xDEADBEEF;
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pxTopOfStack--;
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*pxTopOfStack = (portSTACK_TYPE) 0x12345678; /* Word to which the stack pointer will be left pointing after context restore. */
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pxTopOfStack--;
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*pxTopOfStack = (portSTACK_TYPE) _CP0_GET_CAUSE();
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pxTopOfStack--;
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*pxTopOfStack = (portSTACK_TYPE) portINITIAL_SR; /* CP0_STATUS */
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pxTopOfStack--;
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*pxTopOfStack = (portSTACK_TYPE) pxCode; /* CP0_EPC */
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pxTopOfStack--;
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*pxTopOfStack = (portSTACK_TYPE) NULL; /* ra */
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pxTopOfStack -= 15;
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*pxTopOfStack = (portSTACK_TYPE) pvParameters; /* Parameters to pass in */
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pxTopOfStack -= 14;
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*pxTopOfStack = (portSTACK_TYPE) 0x00000000; /* critical nesting level - no longer used. */
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pxTopOfStack--;
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return pxTopOfStack;
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}
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/*-----------------------------------------------------------*/
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/*
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* Setup a timer for a regular tick.
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*/
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void prvSetupTimerInterrupt( void )
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{
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const unsigned long ulCompareMatch = ( (configPERIPHERAL_CLOCK_HZ / portTIMER_PRESCALE) / configTICK_RATE_HZ ) - 1;
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OpenTimer1( ( T1_ON | T1_PS_1_8 | T1_SOURCE_INT ), ulCompareMatch );
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ConfigIntTimer1( T1_INT_ON | configKERNEL_INTERRUPT_PRIORITY );
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}
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/*-----------------------------------------------------------*/
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void vPortEndScheduler(void)
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{
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/* It is unlikely that the scheduler for the PIC port will get stopped
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once running. If required disable the tick interrupt here, then return
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to xPortStartScheduler(). */
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for( ;; );
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}
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/*-----------------------------------------------------------*/
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portBASE_TYPE xPortStartScheduler( void )
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{
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extern void vPortStartFirstTask( void );
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extern void *pxCurrentTCB;
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/* Setup the software interrupt. */
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mConfigIntCoreSW0( CSW_INT_ON | configKERNEL_INTERRUPT_PRIORITY | CSW_INT_SUB_PRIOR_0 );
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/* Setup the timer to generate the tick. Interrupts will have been
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disabled by the time we get here. */
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prvSetupTimerInterrupt();
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/* Kick off the highest priority task that has been created so far.
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Its stack location is loaded into uxSavedTaskStackPointer. */
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uxSavedTaskStackPointer = *( unsigned portBASE_TYPE * ) pxCurrentTCB;
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vPortStartFirstTask();
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/* Should never get here as the tasks will now be executing. */
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return pdFALSE;
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}
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/*-----------------------------------------------------------*/
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void vPortIncrementTick( void )
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{
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unsigned portBASE_TYPE uxSavedStatus;
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uxSavedStatus = uxPortSetInterruptMaskFromISR();
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vTaskIncrementTick();
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vPortClearInterruptMaskFromISR( uxSavedStatus );
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/* If we are using the preemptive scheduler then we might want to select
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a different task to execute. */
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#if configUSE_PREEMPTION == 1
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SetCoreSW0();
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#endif /* configUSE_PREEMPTION */
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/* Clear timer 0 interrupt. */
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mT1ClearIntFlag();
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}
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/*-----------------------------------------------------------*/
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unsigned portBASE_TYPE uxPortSetInterruptMaskFromISR( void )
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{
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unsigned portBASE_TYPE uxSavedStatusRegister;
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asm volatile ( "di" );
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uxSavedStatusRegister = _CP0_GET_STATUS() | 0x01;
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/* This clears the IPL bits, then sets them to
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configMAX_SYSCALL_INTERRUPT_PRIORITY. This function should not be called
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from an interrupt that has a priority above
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configMAX_SYSCALL_INTERRUPT_PRIORITY so, when used correctly, the action
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can only result in the IPL being unchanged or raised, and therefore never
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lowered. */
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_CP0_SET_STATUS( ( ( uxSavedStatusRegister & ( ~portALL_IPL_BITS ) ) ) | ( configMAX_SYSCALL_INTERRUPT_PRIORITY << portIPL_SHIFT ) );
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return uxSavedStatusRegister;
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}
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/*-----------------------------------------------------------*/
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void vPortClearInterruptMaskFromISR( unsigned portBASE_TYPE uxSavedStatusRegister )
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{
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_CP0_SET_STATUS( uxSavedStatusRegister );
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}
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/*-----------------------------------------------------------*/
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