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44 lines
1.5 KiB
C
44 lines
1.5 KiB
C
17 years ago
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/* Coldfire C Header File
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* Copyright Freescale Semiconductor Inc
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* All rights reserved.
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*
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* 2007/03/19 Revision: 0.9
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*/
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#ifndef __MCF5282_CLOCK_H__
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#define __MCF5282_CLOCK_H__
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/*********************************************************************
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*
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* Clock Module (CLOCK)
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*
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*********************************************************************/
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/* Register read/write macros */
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#define MCF_CLOCK_SYNCR (*(vuint16*)(&__IPSBAR[0x120000]))
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#define MCF_CLOCK_SYNSR (*(vuint8 *)(&__IPSBAR[0x120002]))
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/* Bit definitions and macros for MCF_CLOCK_SYNCR */
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#define MCF_CLOCK_SYNCR_STPMD0 (0x4)
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#define MCF_CLOCK_SYNCR_STPMD1 (0x8)
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#define MCF_CLOCK_SYNCR_FWKUP (0x20)
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#define MCF_CLOCK_SYNCR_DISCLK (0x40)
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#define MCF_CLOCK_SYNCR_LOCEN (0x80)
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#define MCF_CLOCK_SYNCR_RFD(x) (((x)&0x7)<<0x8)
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#define MCF_CLOCK_SYNCR_LOCRE (0x800)
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#define MCF_CLOCK_SYNCR_MFD(x) (((x)&0x7)<<0xC)
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#define MCF_CLOCK_SYNCR_LOLRE (0x8000)
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/* Bit definitions and macros for MCF_CLOCK_SYNSR */
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#define MCF_CLOCK_SYNSR_LOCS (0x4)
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#define MCF_CLOCK_SYNSR_LOCK (0x8)
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#define MCF_CLOCK_SYNSR_LOCKS (0x10)
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#define MCF_CLOCK_SYNSR_PLLREF (0x20)
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#define MCF_CLOCK_SYNSR_PLLSEL (0x40)
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#define MCF_CLOCK_SYNSR_PLLMODE (0x80)
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#endif /* __MCF5282_CLOCK_H__ */
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