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243 lines
8.4 KiB
C
243 lines
8.4 KiB
C
19 years ago
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/*
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FreeRTOS V4.0.1 - Copyright (C) 2003-2006 Richard Barry.
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This file is part of the FreeRTOS distribution.
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FreeRTOS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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FreeRTOS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with FreeRTOS; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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A special exception to the GPL can be applied should you wish to distribute
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a combined work that includes FreeRTOS, without being obliged to provide
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the source code for any proprietary components. See the licensing section
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of http://www.FreeRTOS.org for full details of how and when the exception
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can be applied.
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***************************************************************************
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See http://www.FreeRTOS.org for documentation, latest information, license
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and contact details. Please ensure to read the configuration and relevant
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port sections of the online documentation.
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***************************************************************************
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*/
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/*-----------------------------------------------------------
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* Implementation of functions defined in portable.h for the ARM7 port
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* using the Keil compiler.
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*
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* Components that can be compiled to either ARM or THUMB mode are
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* contained in this file. The ISR routines, which can only be compiled
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* to ARM mode are contained in portISR.c.
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*----------------------------------------------------------*/
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/*
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Changes from V3.2.2
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+ Bug fix - The prescale value for the timer setup is now written to T0PR
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instead of T0PC. This bug would have had no effect unless a prescale
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value was actually used.
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*/
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/* Standard includes. */
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#include <stdlib.h>
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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#include "task.h"
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/* Constants required to setup the initial task context. */
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#define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
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#define portTHUMB_MODE_BIT ( ( portSTACK_TYPE ) 0x20 )
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#define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 )
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#define portNO_CRITICAL_SECTION_NESTING ( ( portSTACK_TYPE ) 0 )
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/* Constants required to setup the tick ISR. */
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#define portENABLE_TIMER ( ( unsigned portCHAR ) 0x01 )
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#define portPRESCALE_VALUE 0x00
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#define portINTERRUPT_ON_MATCH ( ( unsigned portLONG ) 0x01 )
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#define portRESET_COUNT_ON_MATCH ( ( unsigned portLONG ) 0x02 )
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/* Constants required to setup the VIC for the tick ISR. */
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#define portTIMER_VIC_CHANNEL ( ( unsigned portLONG ) 0x0004 )
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#define portTIMER_VIC_CHANNEL_BIT ( ( unsigned portLONG ) 0x0010 )
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#define portTIMER_VIC_ENABLE ( ( unsigned portLONG ) 0x0020 )
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/*-----------------------------------------------------------*/
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/* Setup the timer to generate the tick interrupts. */
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static void prvSetupTimerInterrupt( void );
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/*
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* The scheduler can only be started from ARM mode, so
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* vPortISRStartFirstSTask() is defined in portISR.c.
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*/
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extern void vPortISRStartFirstTask( void );
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/*-----------------------------------------------------------*/
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/*
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* See header file for description.
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*/
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portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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{
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portSTACK_TYPE *pxOriginalTOS;
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/* Setup the initial stack of the task. The stack is set exactly as
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expected by the portRESTORE_CONTEXT() macro.
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Remember where the top of the (simulated) stack is before we place
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anything on it. */
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pxOriginalTOS = pxTopOfStack;
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/* First on the stack is the return address - which in this case is the
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start of the task. The offset is added to make the return address appear
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as it would within an IRQ ISR. */
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*pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE;
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) 0xaaaaaaaa; /* R14 */
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
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pxTopOfStack--;
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/* The last thing onto the stack is the status register, which is set for
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system mode, with interrupts enabled. */
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*pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;
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#ifdef KEIL_THUMB_INTERWORK
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{
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/* We want the task to start in thumb mode. */
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*pxTopOfStack |= portTHUMB_MODE_BIT;
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}
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#endif
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pxTopOfStack--;
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/* The code generated by the Keil compiler does not maintain separate
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stack and frame pointers. The portENTER_CRITICAL macro cannot therefore
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use the stack as per other ports. Instead a variable is used to keep
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track of the critical section nesting. This variable has to be stored
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as part of the task context and is initially set to zero. */
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*pxTopOfStack = portNO_CRITICAL_SECTION_NESTING;
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return pxTopOfStack;
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}
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/*-----------------------------------------------------------*/
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portBASE_TYPE xPortStartScheduler( void )
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{
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/* Start the timer that generates the tick ISR. */
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prvSetupTimerInterrupt();
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/* Start the first task. This is done from portISR.c as ARM mode must be
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used. */
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vPortISRStartFirstTask();
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/* Should not get here! */
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return 0;
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}
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/*-----------------------------------------------------------*/
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void vPortEndScheduler( void )
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{
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/* It is unlikely that the ARM port will require this function as there
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is nothing to return to. If this is required - stop the tick ISR then
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return back to main. */
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}
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/*-----------------------------------------------------------*/
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static void prvSetupTimerInterrupt( void )
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{
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unsigned portLONG ulCompareMatch;
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/* A 1ms tick does not require the use of the timer prescale. This is
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defaulted to zero but can be used if necessary. */
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T0PR = portPRESCALE_VALUE;
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/* Calculate the match value required for our wanted tick rate. */
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ulCompareMatch = configCPU_CLOCK_HZ / configTICK_RATE_HZ;
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/* Protect against divide by zero. Using an if() statement still results
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in a warning - hence the #if. */
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#if portPRESCALE_VALUE != 0
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{
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ulCompareMatch /= ( portPRESCALE_VALUE + 1 );
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}
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#endif
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T0MR0 = ulCompareMatch;
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/* Generate tick with timer 0 compare match. */
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T0MCR = portRESET_COUNT_ON_MATCH | portINTERRUPT_ON_MATCH;
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/* Setup the VIC for the timer. */
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VICIntSelect &= ~( portTIMER_VIC_CHANNEL_BIT );
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VICIntEnable |= portTIMER_VIC_CHANNEL_BIT;
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/* The ISR installed depends on whether the preemptive or cooperative
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scheduler is being used. */
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#if configUSE_PREEMPTION == 1
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{
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#ifdef KEIL_THUMB_INTERWORK
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extern void ( vPreemptiveTick )( void ) __arm __task;
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#else
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extern void ( vPreemptiveTick )( void ) __task;
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#endif
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VICVectAddr0 = ( unsigned portLONG ) vPreemptiveTick;
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}
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#else
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{
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extern void ( vNonPreemptiveTick )( void ) __irq;
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VICVectAddr0 = ( portLONG ) vNonPreemptiveTick;
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}
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#endif
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VICVectCntl0 = portTIMER_VIC_CHANNEL | portTIMER_VIC_ENABLE;
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/* Start the timer - interrupts are disabled when this function is called
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so it is okay to do this here. */
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T0TCR = portENABLE_TIMER;
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}
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/*-----------------------------------------------------------*/
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