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/*
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FreeRTOS.org V4.7.2 - Copyright (C) 2003-2008 Richard Barry.
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This file is part of the FreeRTOS.org distribution.
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FreeRTOS.org is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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FreeRTOS.org is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with FreeRTOS.org; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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A special exception to the GPL can be applied should you wish to distribute
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a combined work that includes FreeRTOS.org, without being obliged to provide
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the source code for any proprietary components. See the licensing section
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of http://www.FreeRTOS.org for full details of how and when the exception
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can be applied.
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***************************************************************************
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Please ensure to read the configuration and relevant port sections of the
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online documentation.
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+++ http://www.FreeRTOS.org +++
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Documentation, latest information, license and contact details.
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+++ http://www.SafeRTOS.com +++
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A version that is certified for use in safety critical systems.
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+++ http://www.OpenRTOS.com +++
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Commercial support, development, porting, licensing and training services.
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***************************************************************************
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*/
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/*
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Change from V4.2.1:
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+ Introduced usage of configKERNEL_INTERRUPT_PRIORITY macro to set the
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interrupt priority used by the kernel.
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*/
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#include <FreeRTOSConfig.h>
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/* For backward compatibility, ensure configKERNEL_INTERRUPT_PRIORITY is
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defined. The value zero should also ensure backward compatibility.
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FreeRTOS.org versions prior to V4.3.0 did not include this definition. */
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#ifndef configKERNEL_INTERRUPT_PRIORITY
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#define configKERNEL_INTERRUPT_PRIORITY 0
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#endif
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RSEG CODE:CODE(2)
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thumb
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EXTERN vPortYieldFromISR
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EXTERN uxCriticalNesting
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EXTERN pxCurrentTCB
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EXTERN vTaskSwitchContext
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PUBLIC vSetMSP
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PUBLIC xPortPendSVHandler
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PUBLIC vPortSetInterruptMask
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PUBLIC vPortClearInterruptMask
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PUBLIC vPortSVCHandler
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PUBLIC vPortStartFirstTask
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/*-----------------------------------------------------------*/
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vSetMSP
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msr msp, r0
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bx lr
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/*-----------------------------------------------------------*/
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xPortPendSVHandler:
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mrs r0, psp
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ldr r3, =pxCurrentTCB /* Get the location of the current TCB. */
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ldr r2, [r3]
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ldr r1, =uxCriticalNesting /* Save the remaining registers and the critical nesting count onto the task stack. */
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ldr r1, [r1]
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stmdb r0!, {r1,r4-r11}
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str r0, [r2] /* Save the new top of stack into the first member of the TCB. */
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stmdb sp!, {r3, r14}
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bl vTaskSwitchContext
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ldmia sp!, {r3, r14}
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ldr r1, [r3]
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ldr r2, =uxCriticalNesting
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ldr r0, [r1] /* The first item in pxCurrentTCB is the task top of stack. */
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ldmia r0!, {r1, r4-r11} /* Pop the registers and the critical nesting count. */
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str r1, [r2] /* Save the new critical nesting value into ulCriticalNesting. */
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msr psp, r0
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orr r14, r14, #13
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cbnz r1, sv_disable_interrupts /* If the nesting count is greater than 0 we need to exit with interrupts masked. */
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bx r14
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sv_disable_interrupts:
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mov r1, #configKERNEL_INTERRUPT_PRIORITY
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msr basepri, r1
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bx r14
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/*-----------------------------------------------------------*/
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vPortSetInterruptMask:
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push { r0 }
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mov R0, #configKERNEL_INTERRUPT_PRIORITY
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msr BASEPRI, R0
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pop { R0 }
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bx r14
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/*-----------------------------------------------------------*/
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vPortClearInterruptMask:
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PUSH { r0 }
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MOV R0, #0
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MSR BASEPRI, R0
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POP { R0 }
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bx r14
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/*-----------------------------------------------------------*/
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vPortSVCHandler;
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ldr r3, =pxCurrentTCB
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ldr r1, [r3]
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ldr r0, [r1]
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ldmia r0!, {r1, r4-r11}
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ldr r2, =uxCriticalNesting
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str r1, [r2]
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msr psp, r0
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orr r14, r14, #13
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bx r14
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/*-----------------------------------------------------------*/
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vPortStartFirstTask
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msr msp, r0
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svc 0
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END
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