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/******************************************************************
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***** *****
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***** Name: cs8900.c *****
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***** Ver.: 1.0 *****
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***** Date: 07/05/2001 *****
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***** Auth: Andreas Dannenberg *****
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***** HTWK Leipzig *****
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***** university of applied sciences *****
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***** Germany *****
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***** Func: ethernet packet-driver for use with LAN- *****
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***** controller CS8900 from Crystal/Cirrus Logic *****
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***** *****
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***** Keil: Module modified for use with Philips *****
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***** LPC2378 EMAC Ethernet controller *****
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***** *****
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******************************************************************/
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/* Adapted from file originally written by Andreas Dannenberg. Supplied with permission. */
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#include "FreeRTOS.h"
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#include "semphr.h"
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#include "task.h"
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#include "emac.h"
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/* The semaphore used to wake the uIP task when data arives. */
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xSemaphoreHandle xEMACSemaphore = NULL;
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static unsigned short *rptr;
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static unsigned short *tptr;
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// easyWEB internal function
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// help function to swap the byte order of a WORD
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static unsigned short SwapBytes(unsigned short Data)
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{
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return (Data >> 8) | (Data << 8);
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}
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// Keil: function added to write PHY
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void write_PHY (int PhyReg, int Value)
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{
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unsigned int tout;
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MADR = DP83848C_DEF_ADR | PhyReg;
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MWTD = Value;
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/* Wait utill operation completed */
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tout = 0;
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for (tout = 0; tout < MII_WR_TOUT; tout++) {
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if ((MIND & MIND_BUSY) == 0) {
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break;
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}
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}
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}
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// Keil: function added to read PHY
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unsigned short read_PHY (unsigned char PhyReg)
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{
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unsigned int tout;
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MADR = DP83848C_DEF_ADR | PhyReg;
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MCMD = MCMD_READ;
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/* Wait until operation completed */
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tout = 0;
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for (tout = 0; tout < MII_RD_TOUT; tout++) {
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if ((MIND & MIND_BUSY) == 0) {
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break;
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}
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}
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MCMD = 0;
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return (MRDD);
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}
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// Keil: function added to initialize Rx Descriptors
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void rx_descr_init (void)
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{
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unsigned int i;
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for (i = 0; i < NUM_RX_FRAG; i++) {
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RX_DESC_PACKET(i) = RX_BUF(i);
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RX_DESC_CTRL(i) = RCTRL_INT | (ETH_FRAG_SIZE-1);
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RX_STAT_INFO(i) = 0;
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RX_STAT_HASHCRC(i) = 0;
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}
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/* Set EMAC Receive Descriptor Registers. */
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RxDescriptor = RX_DESC_BASE;
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RxStatus = RX_STAT_BASE;
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RxDescriptorNumber = NUM_RX_FRAG-1;
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/* Rx Descriptors Point to 0 */
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RxConsumeIndex = 0;
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}
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// Keil: function added to initialize Tx Descriptors
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void tx_descr_init (void) {
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unsigned int i;
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for (i = 0; i < NUM_TX_FRAG; i++) {
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TX_DESC_PACKET(i) = TX_BUF(i);
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TX_DESC_CTRL(i) = 0;
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TX_STAT_INFO(i) = 0;
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}
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/* Set EMAC Transmit Descriptor Registers. */
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TxDescriptor = TX_DESC_BASE;
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TxStatus = TX_STAT_BASE;
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TxDescriptorNumber = NUM_TX_FRAG-1;
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/* Tx Descriptors Point to 0 */
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TxProduceIndex = 0;
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}
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// configure port-pins for use with LAN-controller,
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// reset it and send the configuration-sequence
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portBASE_TYPE Init_EMAC(void)
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{
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portBASE_TYPE xReturn = pdPASS;
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static portBASE_TYPE xAttempt = 0;
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// Keil: function modified to access the EMAC
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// Initializes the EMAC ethernet controller
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volatile unsigned int regv,tout,id1,id2;
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/* Enable P1 Ethernet Pins. */
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PINSEL2 = configPINSEL2_VALUE;
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PINSEL3 = (PINSEL3 & ~0x0000000F) | 0x00000005;
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/* Power Up the EMAC controller. */
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PCONP |= 0x40000000;
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vTaskDelay( 10 );
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/* Reset all EMAC internal modules. */
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MAC1 = MAC1_RES_TX | MAC1_RES_MCS_TX | MAC1_RES_RX | MAC1_RES_MCS_RX |
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MAC1_SIM_RES | MAC1_SOFT_RES;
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Command = CR_REG_RES | CR_TX_RES | CR_RX_RES;
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/* A short delay after reset. */
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vTaskDelay( 10 );
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/* Initialize MAC control registers. */
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MAC1 = MAC1_PASS_ALL;
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MAC2 = MAC2_CRC_EN | MAC2_PAD_EN;
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MAXF = ETH_MAX_FLEN;
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CLRT = CLRT_DEF;
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IPGR = IPGR_DEF;
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/* Enable Reduced MII interface. */
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Command = CR_RMII | CR_PASS_RUNT_FRM;
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/* Reset Reduced MII Logic. */
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SUPP = SUPP_RES_RMII;
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SUPP = 0;
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/* Put the DP83848C in reset mode */
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write_PHY (PHY_REG_BMCR, 0x8000);
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write_PHY (PHY_REG_BMCR, 0x8000);
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/* Wait for hardware reset to end. */
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for (tout = 0; tout < 100; tout++) {
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vTaskDelay( 200 );
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regv = read_PHY (PHY_REG_BMCR);
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if (!(regv & 0x8000)) {
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/* Reset complete */
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break;
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}
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}
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/* Check if this is a DP83848C PHY. */
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id1 = read_PHY (PHY_REG_IDR1);
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id2 = read_PHY (PHY_REG_IDR2);
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if (((id1 << 16) | (id2 & 0xFFF0)) == DP83848C_ID) {
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/* Configure the PHY device */
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/* Use autonegotiation about the link speed. */
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write_PHY (PHY_REG_BMCR, PHY_AUTO_NEG);
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/* Wait to complete Auto_Negotiation. */
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for (tout = 0; tout < 10; tout++) {
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vTaskDelay( 200 );
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regv = read_PHY (PHY_REG_BMSR);
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if (regv & 0x0020) {
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/* Autonegotiation Complete. */
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break;
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}
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}
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}
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else
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{
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xReturn = pdFAIL;
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}
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/* Check the link status. */
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if( xReturn == pdPASS )
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{
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xReturn = pdFAIL;
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for (tout = 0; tout < 10; tout++) {
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vTaskDelay( 200 );
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regv = read_PHY (PHY_REG_STS);
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if (regv & 0x0001) {
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/* Link is on. */
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xReturn = pdPASS;
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break;
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}
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}
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}
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if( xReturn == pdPASS )
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{
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/* Configure Full/Half Duplex mode. */
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if (regv & 0x0004) {
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/* Full duplex is enabled. */
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MAC2 |= MAC2_FULL_DUP;
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Command |= CR_FULL_DUP;
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IPGT = IPGT_FULL_DUP;
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}
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else {
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/* Half duplex mode. */
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IPGT = IPGT_HALF_DUP;
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}
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/* Configure 100MBit/10MBit mode. */
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if (regv & 0x0002) {
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/* 10MBit mode. */
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SUPP = 0;
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}
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else {
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/* 100MBit mode. */
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SUPP = SUPP_SPEED;
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}
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/* Set the Ethernet MAC Address registers */
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SA0 = (emacETHADDR0 << 8) | emacETHADDR1;
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SA1 = (emacETHADDR2 << 8) | emacETHADDR3;
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SA2 = (emacETHADDR4 << 8) | emacETHADDR5;
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/* Initialize Tx and Rx DMA Descriptors */
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rx_descr_init ();
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tx_descr_init ();
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/* Receive Broadcast and Perfect Match Packets */
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RxFilterCtrl = RFC_UCAST_EN | RFC_BCAST_EN | RFC_PERFECT_EN;
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/* Create the semaphore used ot wake the uIP task. */
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vSemaphoreCreateBinary( xEMACSemaphore );
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/* Reset all interrupts */
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IntClear = 0xFFFF;
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/* Enable receive and transmit mode of MAC Ethernet core */
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Command |= (CR_RX_EN | CR_TX_EN);
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MAC1 |= MAC1_REC_EN;
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}
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return xReturn;
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}
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// reads a word in little-endian byte order from RX_BUFFER
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unsigned short ReadFrame_EMAC(void)
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{
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return (*rptr++);
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}
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// reads a word in big-endian byte order from RX_FRAME_PORT
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// (useful to avoid permanent byte-swapping while reading
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// TCP/IP-data)
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unsigned short ReadFrameBE_EMAC(void)
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{
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unsigned short ReturnValue;
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ReturnValue = SwapBytes (*rptr++);
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return (ReturnValue);
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}
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// copies bytes from frame port to MCU-memory
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// NOTES: * an odd number of byte may only be transfered
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// if the frame is read to the end!
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// * MCU-memory MUST start at word-boundary
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void CopyFromFrame_EMAC(void *Dest, unsigned short Size)
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{
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unsigned short * piDest; // Keil: Pointer added to correct expression
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piDest = Dest; // Keil: Line added
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while (Size > 1) {
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*piDest++ = ReadFrame_EMAC();
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Size -= 2;
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}
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if (Size) { // check for leftover byte...
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*(unsigned char *)piDest = (char)ReadFrame_EMAC();// the LAN-Controller will return 0
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} // for the highbyte
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}
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// does a dummy read on frame-I/O-port
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// NOTE: only an even number of bytes is read!
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void DummyReadFrame_EMAC(unsigned short Size) // discards an EVEN number of bytes
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{ // from RX-fifo
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while (Size > 1) {
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ReadFrame_EMAC();
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Size -= 2;
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}
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}
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// Reads the length of the received ethernet frame and checks if the
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// destination address is a broadcast message or not
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// returns the frame length
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unsigned short StartReadFrame(void) {
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unsigned short RxLen;
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unsigned int idx;
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idx = RxConsumeIndex;
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RxLen = (RX_STAT_INFO(idx) & RINFO_SIZE) - 3;
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rptr = (unsigned short *)RX_DESC_PACKET(idx);
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return(RxLen);
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}
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void EndReadFrame(void) {
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unsigned int idx;
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/* DMA free packet. */
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idx = RxConsumeIndex;
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if (++idx == NUM_RX_FRAG)
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idx = 0;
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RxConsumeIndex = idx;
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}
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unsigned int CheckFrameReceived(void) { // Packet received ?
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if (RxProduceIndex != RxConsumeIndex) // more packets received ?
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return(1);
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else
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return(0);
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}
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unsigned int uiGetEMACRxData( unsigned char *ucBuffer )
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{
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unsigned int uiLen = 0;
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if( RxProduceIndex != RxConsumeIndex )
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{
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uiLen = StartReadFrame();
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CopyFromFrame_EMAC( ucBuffer, uiLen );
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EndReadFrame();
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}
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return uiLen;
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}
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// requests space in EMAC memory for storing an outgoing frame
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void RequestSend(void)
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{
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unsigned int idx;
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idx = TxProduceIndex;
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tptr = (unsigned short *)TX_DESC_PACKET(idx);
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}
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// check if ethernet controller is ready to accept the
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// frame we want to send
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unsigned int Rdy4Tx(void)
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{
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return (1); // the ethernet controller transmits much faster
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} // than the CPU can load its buffers
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// writes a word in little-endian byte order to TX_BUFFER
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void WriteFrame_EMAC(unsigned short Data)
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{
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*tptr++ = Data;
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}
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// copies bytes from MCU-memory to frame port
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// NOTES: * an odd number of byte may only be transfered
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// if the frame is written to the end!
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// * MCU-memory MUST start at word-boundary
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void CopyToFrame_EMAC(void *Source, unsigned int Size)
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{
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unsigned short * piSource;
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piSource = Source;
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Size = (Size + 1) & 0xFFFE; // round Size up to next even number
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while (Size > 0) {
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WriteFrame_EMAC(*piSource++);
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Size -= 2;
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}
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}
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void DoSend_EMAC(unsigned short FrameSize)
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{
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unsigned int idx;
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idx = TxProduceIndex;
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TX_DESC_CTRL(idx) = FrameSize | TCTRL_LAST;
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if (++idx == NUM_TX_FRAG) idx = 0;
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TxProduceIndex = idx;
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}
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